Radio Shack TRS-80 Service Manual page 52

02 is used as the write data pulse on nominal (EARLY'"
LATE
-'=
OJ.
01 is used for the early, and 03 is used for the
late. The leading edge of 04 resets the STB line in anticipa·
tion of the next write data pulse. When TG43 '" 0 or OOEN"
=
1, precompemation is disabled and any transitions on the
WOIN line will appear on the WOOUT line.
When VFOE""fwF ood WG are low, the Clock Recovery cir·
cuits are enabled. When the
RoO~
line goes low, the PU or
PO"" signals will become active. If the ROo* has made its
transition in the beginning of the RCLK window, PU will
go from a high impedence state to a logic one, requesting an
increase in VCO frequency. If the
ROO~
line has made it
transition at the end of the RCLK window, PU will remain
in the high impedence state while
PD~
will go to a logic zero,
requesting a de(:rease in the VCO frequency. When the lead·
ing edge of
RDD~
occurs in the center o! the RCLK window,
both PU and PO"" will remain in the high impedence state,
indicating that no adjustment of the
veo
frequency is reo
quired. By tying PU and PO"" together, an adjustment slynal
is created which will be forced low for a decrease in VCO
frequency and forced high for an increase in VCO freq·
uency. To speed up rise times and stabilize the output volt·
age, a resistor divider using R7, Rl0, and R9 is used to adjust
the tri-state level at approximately lAV. This adjustment
results in a worst case voltage swing of plus or minus 1V,
which is acceptable for the frequency control input of the
veo
(U141. This signal derived from the combination of PU
and PO"" will eventually correct the
veo
input to exactly
the same frequency multiple as the FDO" signal. The leading
edge of the
RDO~
signal will then occur in the exaet center
of the RCLK window, an ideal condition for the 1793 inter-
nal recovery circuits.
FLOPPY DISK CONTROLLER CHIP
The 1793 is an MaS LSI device which performs the func·
tions of a floppy disk formatter/controller in a single chip
implemetation. The 1793 isfunctionally'identicaltothe 1791
used on the Model II FOC Printer Interface Board, except
that the data bus is true as opposed to inverted. Refer to
the appendix section for more information on the F01793.
The Model II Technical Reference Manual also contains a
good presentation of the 1791 FOC chip as well as 8 dis·
cussion on Write Precompensation. The following port
addresses are assigned to the internal registers of the 1793
FOC chip.
ADJUSTMENTS AND JUMPER OPTIONS
Tne Data separator must be adjusted with the 1793 in an
idle condition (no command currently in operation). Adjust
R7 potentiometer for a l.4V level on pin 2 of U 14. Then
adjust R6 potentiometer to yield a 2MHz square wave at
pin 160fU1J.
The Write Precompensation must be adjusted while executing
a continous write command on a track greClter than twenty-
one. Adjust R5 potentiometer to yield 200nsec wide pulses
at pin 4 of U11. This results in a write precompensation
value of 200nsec.
There are four jumper options on the Floppy Disk Controller
Board. They are designated on the PC Board silkscreen and
are referenced on the SChematic Diagram. The jumpers
should be installed as described below.
JUMPER CONNECTIONS
Ato B
E to G
Lto M
H to J
PORT
#
FOH
FlH
F2H
F3H
FUNCTION
Command/Status Register
Track Register
sector Register
O<lta Register
45