Toshiba PORTEGE S100 Maintenance Manual page 63

2 Troubleshooting Procedures
LED Status
05h
06h
07h
2-22
Table 2-4 D port status (4/8)
Test item
Initialization of SMRAM
Check of CPU supporting Hyper-Threading (for HTT
supporting model)
Initialization of APIC
Check of Wake Up factor
Rewriting of SMRAM base and storing CPU state map
for BIOS
Enabling SMI only by ASMI
Initialization of a device which needs initialization before
initialization of PCI bus
Storing memory configuration in buffer
Reading EC version
Update of flash ROM type
Evaluation of destination (home/overseas) by DMI data
Setting default when a CMOS default (Bad Battery, Bad
Checksum (ROM, CMOS)) check
Initialization of ACPI table (for executing an option ROM)
2.4 System Board Troubleshooting
Message
PIT test (at the Cold Boot) and initialization
Setting of test pattern for PIT#0 of CH0
Check whether the test pattern set can be read.
Initialization of PIT CH0 (Setting of timer interrupt
interval to 55ms)
Initialization of PIT CH2 (Setting of sound generator
frequency to 664Hz)
Test of PIT CH1 (Check whether a refresh signal is
working properly when refresh interval is set to
30ms. HLT when the time is out.)
Test of PIT CH2 (Check whether the speaker gate is
working properly.)
Measuring of CPU clock
Enabling SMI except for auto-off function
Check of parameter block A
Control of input voltage over rating
Control of battery discharge current (1CmA)
Control of AC adapter over current rating
Division process of measuring IRT time
Setting for clock generator
Check of parameter block A
CPU initialization
Setting of CPU core frequency
Judgement of CPU type
Check of Geyserville support
Setting of CPU clock to high
PORTEGE S100 Maintenance Manual (960-508)