Denon S-101 Service Manual page 32

QQ
3 7 63 1515 0
BH7868FS (IC301, 302: 1U-3695)
TE
L 13942296513
LC72720NM (IC506: 1U-3694)
Vref 1
MPXIN 2
Vdda 3
Vssa 4
FLOUT 5
CIN 6
T1 7
T2 8
T3 (RDCL) 9
T4 (RDDA) 10
T5 (RSFT) 11
XOUT 12
www
.
http://www.xiaoyu163.com
Vcc1 1
2
S1
S2 3
CIN 4 Bias 6dB
MUTE1 5' MUTE1
CVIN 6 Clamp 6dB
SEL (CV/MIX) 7
8
YIN Clamp 6dB
9
BIAS Bias
10
SEL (BIAS/CLAMP)
H
Bias
11
Py/G IN
Clamp
L
12
GND
Pb/B IN 13 Bias
14 MUTE2
MUTE2
Pr/R IN 15 Bias
16
Vcc2
Vdda
24 SYR
REFERENCE
23 CE
Vssa
22 DI
21 CL
MPXIN
20 DO
19 RDS-ID
18 SYNC
DO
17 T7 (CORREC/ARI-ID/BEO)
CL
16 T6 (ERROR/57K/BE1) DI
CE
15 Vssd
14 Vddd
T1
13 XIN T2
T3 T7
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
6MHz
75
LFP
S-DCOUT
LPF
L
6MHz
75
LFP
H
6MHz
75
LFP
12MHz
6dB
75
LFP
12MHz
75
LFP
6dB
12MHz
6dB 75
LFP
Q Q
3 6 7 1 3
FLOUT CIN
VREF
VOLTAGE
57kHz
BPF
(SCF)
ANTIALIASING
SMOOTHING
FILTER FILTER
RAM
CCB (24 BLOCK DATA)
MEMORY CONTROL
TEST
.
32
9 4 2 8
32 COUT
31 S-DCOUT
30 CVOUT
29 CVOUT
28 GND
27 YOUT
26
YOUT SAG
25
GND
24
Py/G OUT
23
Py/G OUT SAG
22
GND
21 Pb/B OUT
20 Pb/B OUT SAG
19
GND
18
Pr/R OUT
17 Pr/R OUT SAG
1 5 0 5 8 2 9 9 4
CLOCK
PLL
RECOVERY
(57kHz)
(1167.5Hz)
VREF
DATA
DECODER
ERROR CORRECTION
SYNC/EC CONTROLLER
(SOFT DECISION)
CLK(4.332MHz)
SYNC
DETECT-1
OSC/DIVIDER
XIN XOUT
m
co
S-101
9 9
2 8 9 9
Vddd
Vssd
RDS-ID
SYNC
SYR
SYNC
DETECT-2