Pioneer DVR-310-S Service Manual page 103

5
UPD72852AGB-8EU (MAIN ASSY : IC5101)
• IEEE1394 Physical IC
Pin Arrangement
Block Diagram
CMC
PC0
PC1
PC2
SUS/RES
LREQ
DIRECT
SCLK
LKON
CTL0
CTL1
RESETB
CPS
5
6
DGND 1
SCLK 2
IC (DL) 3
DV 4
DD
CTL0 5
CTL1 6
DGND 7
D0 8
D1 9
DV 10
DD
D2 11
D3 12
DGND 13
D4 14
D5 15
DGND 16
30
26
27
28
19
63
LPS 59
50
Arbitration
and
2
Control State
58
Machine
Logic
5
6
Link
8 Interface
D0
I/O
D1 9
11
D2
12
D3
D4 14
15
D5
D6 17
18
D7
Receive Data
Decoder
and
Retimer
Transmit Data
55
Encoder
Cable
32 Power
Status
6
7
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Cable
Port 0
Cable
Port 1
Voltage
and
Current
Generator
Crystal Oscillator
PLL System
and
Transmit Clock
Generator
DVR-310-S
7
8
TpBias1
AV
DD
TpA1p
TpA1n
TpB1p
TpB1n
AGND
TpBias0
AV
DD
TpA0p
TpA0n
TpB0p
TpB0n
AGND
RI1
AGND
39 TpA0p
38 TpA0n
TpB0p
37
36 TpB0n
46 TpA1p
45 TpA1n
44 TpB1p
43 TpB1n
41 TpBias0
48 TpBias1
34 RI1
23 XI
22 XO
8
A
B
C
D
E
F
103