Advanced Chipset Features - MSI MS-6378 ATX User Manual

Advanced Chipset Features

CMOS Setup Utility - Copyright(C) 1984-2000 Award Software
DRAM Timing by SPD
x
SDRAM Cycle Length
x
DRAM Clock
Memory Hole
P2C/C2P Concurrency
Fast R-W Turn Around
System BIOS Cacheable
Video RAM Cacheable
Frame Buffer Size
AGP Aperture Size
OnChip USB
USB Keyboard Support
OnChip Sound
OnChip Modem
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Memory Parity/ECC Check
↑ ↓ → ←:Move
F5:Previous Values
Note: Change these settings only if you are familiar with the chipset.
DRAM Timing by SPD
Selects whether DRAM timing is configured by reading the contents of the
SPD (Serial Presence Detect) device on the DRAM module. Setting to
Enabled makes both DRAM Cycle Length and DRAM Clock automatically
determined by BIOS according to the configurations on the SPD.
SDRAM Cycle Length
The option controls the CAS latency, which determines the timing delay
before SDRAM starts a read command after receiving it. Settings are Auto, 2
and 3 (clock cycles). 2 increases system performance while 3 provides more
stable system performance. Auto allows BIOS to determine the best CAS
latency length.
Advanced Chipset Features
Enter:Select +/-/PU/PD:Value
F6:Fail-Safe Defaults
Yes
Auto
Auto
Menu Level 8
Disabled
Enabled
Enabled
Disabled
Disabled
8M
64M
Enabled
Disabled
Auto
Auto
Enabled
Enabled
Enabled
Enabled
Enabled
Disabled
Disabled
Disabled
F10:Save ESC:Exit
F7:Optimized Defaults
3-13
®
AWARD BIOS Setup
Item Help
F1:General Help