Zenith D52WLCD Series Service Manual page 23

(3) Block Diagram
Composite 1
decoder
S- Video 1
VGA
(RGB)
STB
( YPbPr)
Composite 2
decoder
S- Video 2
STB2
( YPbPr)
(4) Architecture
Input A CSC
CSC
RGB or
YIQ or
YUV or
YCbCr
(24)
Input B
CSC
CSC
YIQ or
YUV or
YCbCr
(16)
(1080 I, 720P,
480P, 480I,
VGA)
4 M mode
4MB Memory : 4.419MB
Graphic Memory : 0.526MB
DESCRIPTION OF CIRCUITS
NTSC
A
/
D
S/W
NTSC
A
/
D
External
External
Format
Format
Intf .
Intf .
Converter
Converter
External Format
Format
External
Converter
Intf .
Intf . Converter
SDRAM
SDRAM
Interface
Interface
4 MB or 8MB
SDRAM
(>540x960x1=0.518MB)
Display PLL
RGB or
YIQ or
YUV or
YCbCr
(24)
DTV ready video chip
NTSC/PC/STB
PIP/POP/split - screen/zoom
60/50Hz display
YIQ or
2- D graphic with OSD
YUV or
Color space conversion
YCbCr
NTSC up - conversion
(16)
Y
Enhance
Enhance
Host I/F
Host I/F
8 M mode
8MB Memory : 8.389MB
Graphic Memory : 1.503MB
- 23 -
SDRAM
8(4) Mbytes
3xDAC, PLL
CPU
Y
CSC Grap .
CSC Grap .
/LUT Proc.
/LUT Proc.
Sync
Sync
Generator
Generator
(>540x1920x1=1.037MB)
1080 I/
768(720)P/
480P(I)/
576P(I),
16:9 or 4:3,
analog or digital
YPbPr /RGB
(1080I, 768P,
720P, 480P)
DAC
DAC