Intel AN430TX Specification Update page 28

AN430TX SPECIFICATION UPDATE
There are several POST routines that issue a POST Terminal Error and shut down the system if they fail.
Before shutting down the system, the terminal-error handler issues a beep code signifying the test point error,
writes the error to I/O port 80h, attempts to initialize the video and writes the error in the upper left corner of
the screen (using both mono and color adapters).
If POST completes normally, the BIOS issues one short beep before passing control to the operating system.
Table 43. BIOS Beep Codes
Beeps Port 80h Code
1-2-2-3 16h
1-3-1-1 20h
1-3-1-3 22h
1-3-3-1 28h
1-3-3-2 29h
1-3-3-3 2Ah
1-3-4-1 2Ch
1-3-4-3 2Eh
1-4-1-1 30h
2-1-2-2 45h
2-1-2-3 46h
2-2-3-1 58h
2-2-4-1 5Ch
1-2 98h
13. Revision of Section 3.1.4, PCI IDE Support
This section will be replaced in its entirety as follows:
If you select "Auto" in Setup, the BIOS automatically sets up the two local bus IDE connectors with
independent I/O channel support. The IDE interface supports hard drives up to PIO Mode 4 and recognizes
any ATAPI devices, including CD-ROM drives, tape drives and Ultra DMA drives (see Section 5.1 for the
supported version of ATAPI). Add-in ISA IDE controllers are not supported. The BIOS determines the
capabilities of each drive and configures them to optimize capacity and performance. To take advantage of
the high capacities typically available today, hard drives are automatically configured for Logical Block
Addressing (LBA) and to PIO Mode 3 or 4, depending on the capability of the drive. You can override the
auto-configuration options by specifying manual configuration in Setup. The ATAPI Specification
recommends that ATAPI devices be configured as shown in Table 41.
22
Explanation
BIOS ROM checksum
Test DRAM refresh
Test 8742 Keyboard Controller
Autosize DRAM
Initialize POST Memory Manager
Clear 512 KB base RAM
RAM failure on address line xxxx
RAM failure on data bits xxxx of low byte of memory bus
RAM failure on data bits xxxx of high byte of memory bus
POST device initialization
Check ROM copy right notice
Test for unexpected interrupts
Test RAM between 512 and 640 KB
Search for option ROMs. One long, two short beeps on checksum failure