A3.4.4 Dn5 Circuit Diagram - Oki OKIFAX 5750 Service Manual

Facsimile machine
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Service Guide OKIFAX 5750/5950
Page: 285
Chapter A Board Descriptions

A3.4.4 DN5 circuit diagram

1 Lightning arresters (AR1, 2)
The nominal operating voltage is 500 V. When connecting the ground of the arrestor to the chassis, tighten ARG on the PCB with a screw. At this time, the PCB
is grounded through the power cable. The TB1 arrestor ground terminal can also be used to connect to the earth directly.
2 Loop current detector (IC4) - Optional
When a line is hunt, this circuit detects a DC loop current to notify the fact. For detection (OH1), it outputs the low level to the nominal input current of 10 mA or
more.
3 Diode bridge (DB1)
This circuit rectifies the loop current so that the DC circuit characteristics are not affected by a polarity change over the line.
4 DC circuits (Q3, R540, R541, C13, R9, R209)
These circuits provide DC characteristics according to the line requirements.
5 Impedance matching network (R523, R536, C503, ...)
This circuit matches the impedance between the line and equipment to reduce reflection of transmitted signals. It provides impedance (return loss) characteristics
to meet the line requirement using the S4-3 and S4-4.
6 Receiving sensitivity (R537, R539, R637, R639)
The receiving sensitivity at line hunting is determined by R539 to R639 depending on the line impedance. Similarly, the MF tone receiving sensitivity at parallel
pickup is determined by R537 or R637. The receiving sensitivity is set using the DIP switches S4-5 to S4-8.
7 CML (RL1)
This circuit selectively switches the line between the telephone or facsimile.
8 SR (RL2)
This circuit connects the line with the telephone. During facsimile transmission, it disconnects the telephone.
9 DP (IC5)
This circuit generates pulse dial signals.
0 MUTE (IC7)
During pulse dialing, this circuit closes to reduce the DC loop resistance.

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