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Intel
IXP2400/IXP2800 Network Processors
Transactor
All multi-line C statements such as if, while, for, #if, and #ifndef must contain only C statements.
Consider the following script files (a.ind and b.ind):
Contents of a.ind:
#ifndef A
@b.ind
printf("a.ind\n");
#endif
Contents of b.ind:
printf("b.ind\n");
Pre-processor statements - statements prefixed by '#' characters - are C statements. Statements
prefixed by a '@' characters are not C statements, but rather, Transactor commands. Thus this
script file will fail with a Transactor error. However, replacing the statement '@b.ind' with
'cmd( "@b.ind" );' makes the example work fine.
8.4.1
C macros supported
Other non-C extensions supported by interpreter:
•
Verilog constants can be specified: (e.g. 44'hdeadbeef or 8'b0x11_xx11 )
•
define (tic define) values defined in the model can be referenced
8.4.2
Supported Data Types
The Vmod C interpreter supports the following datatypes:
•
int: The standard 32-bit signed datatype. They are defined in the normal way by "int foo;"
•
model states: Any model simulation variable defined by the compiled hardware model can be
referenced in a C expression simply by specifying the pre-existing state name (e.g
"i.c0.cmd_req = 1;"). In addition, bit fields specifications for a model state can be specified by
appending a function argument list to the end of the state name. For non-arrayed states, the
argument list is: "( int msb, int lsb )". The "lsb" argument is optional and defaults to the "msb"
value. Additionally, a single colon-separated argument of the form "msb:lsb" is also supported
for specifying bit ranges. For arrayed states, the argument list is
"( int array_index, int msb, int lsb )"
If neither "msb" nor "lsb" is specified, the entire state width is assumed. If only "lsb" is not
specified, it defaults to the "msb" value. Here are some examples
i.c0.cmd_req( 3 );
i.c0.cmd_req( 5, 3 ) = 5; // field inserts 5 into ti.c0.cmd_req[5:3]
i.c0.cmd_req( 5 : 3 ) = 5; // identical to above form
i.ustore( 23 );
i.ustore( 23, 11:6 ) = 12; // field inserts 12 into i.ustore[23]<11:6>
i.ustore( 23, 7 );
•
vectX: A user-specified unsigned vector datatype whose bit width is specified by X (where X
is a positive integer). The interpreter supports all logical, equivalence, bit-wise and arithmetic
binary operators on the specified bit precision of the vector (e.g. two 100-bit vectors can be
added to produce a 100-bit result). A vector declaration has two forms: "vect128 foo;" defines
250
// bit extracts bit 3 of ti.c0.cmd_req
// references whole word of i.ustore[23]
// extracts bit 7 of i.ustore[23]
Development Tools User's Guide
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