MSI MS-7226 (V1.X) Manual page 65

V1.x atx mainboard
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MCT Timing M ode
This field has the capacity to automatically detect all of the DRAM timing. If you
set this field to [Manual], the following fields will be selectable.
CAS# Latency (TCL)
W hen the M CT Timing M ode sets to [Manual], the field is adjustable.This
controls the CAS latency, which determines the timing delay (in clock cycles)
before SDRAM starts a read command after receiving it.
Min RAS# Active Time (TRAS)
W hen the M CT Timing Mode sets to [Manual], the field is adjustable. This
setting determines the time RAS takes to read from and write to a memory cell.
RAS# Precharge Time (TRP)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. This item
controls the number of cycles for Row Address Strobe (RAS) to be allowed to
precharge. If insufficient time is allowed for the RAS to accumulate its charge
before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain
data. This item applies only when synchronous DRAM is installed in the system.
RAS# to CAS# Delay (TRCD)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. W hen
DRAM is refreshed, both rows and columns are addressed separately. This
setup item allows you to determine the timing of the transition from RAS (row
address strobe) to CAS (column address strobe). The less the clock cycles, the
faster the DRAM performance.
ROW to ROW Delay (TRRD)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. Specifies
the active-to-active delay of different banks.
ROW Cycle Time (TRC)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. The row
cycle time determines the minimum number of clock cycles a memory row takes
to complete a full cycle, from row activation up to the precharging of the active
r ow.
Bank Interleaveing
W hen the MCT Timing Mode is set to [Manual], the field is adjustable. This
field selects 2-bank or 4-bank interleave for the installed SDRAM. Disable the
function if 16MB SDRAM is installed.
CM D-ADDR Timing Mode
W hen the MCT Timing Mode is set to [Manual], the field is adjustable. This
field controls the SDRAM command rate. Selecting [1T] makes SDRAM signal
controller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM signal
controller run at 2T rate.
BIOS Setup
3-25

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