Op Driver Schematic Diagram - JVC GR-D30UB Specification

OP DRIVER SCHEMATIC DIAGRAM

0 1 MAIN(OP DRIVER)
L4802
5 10µ
C4803
10 /6.3
4
3
H_GAIN
TO DV_MAIN
H_OFFSET
CAM_VD
CAM_VD
CLK4M5
TO CAM_DSP CLK4M5
IRIS_PWM
M_REG4.8
REG_4.8V
REG_3.1V
M_REG4.8
HALL_AD
TO CPU
IRIS_O/C
TO CAM_DSP
IRIS_C
2
F/Z_CS
F/Z_CS
DATA_OUT
CAM_OUT
CLK_OUT
TO CPU CAM_CLK
TG_RST
TG_RST
GND
Z_PTR_AD
Z_PTR_AD
F_PTR_AD
TO CPU F_PTR_AD
OP_THRMO
OP_THRMO
1
NOTE: The parts with marked ( ) is not used.
A
C4804
0.1
T
R4806
68k
R4812
15k
R4807
56K
C4808
1
C4807 C4809 R4808
0.1 24k
C4820 R4809
560
L4853
R4875
10µ
0R0
T
C4865 C4864
0.1 10 /6.3
R4876
R4846
L4852 10µ C4854
10 /10
C4853
3.3 /10
T T
B C
IC4807
SN74AHC2G66U-X R4839
Q4802
R4825
R4840
R4841
R4826 R4849
0
R4850
R4823
1k
C4811
0.01
R4816
R4842
1M
0
R4813
C4812
0.1 C4815
1500P
PGND
EXTa
R4873
C4855 EXTb IC4851
0.1
Vm1
UPD16879GS-X
FOCUS01
A1
R4862
FBa
6.8
FOCUS03
A2
Vm2
FOCUS04
B1
R4863
FBb
6.8
FOCUS02
B2
R4871
0Ω
CAM_VD R4864
VD
1k R4865
F/Z_CS 1k
LATCH
DATA_OUT R4866
SDATA
1k R4867
CLK_OUT 1k
SCLK
CLK4M5 R4868
OSCin
0Ω
OSCout
TG_RST
RESET
C4866
R4852
D E
2-17 2-18
R4804
680
R4817
330k
R4833
R4837
100k
C4823
0
R4836
0Ω
R4831
R4843
0Ω
R4844
150 Q4805
Q4806
2SC4617/RS/-X
R4819
10k
R4820
100k R4847
C4814
0.1 C4813
0.1
R4830
L4851
NQR0129-002X
R4872 C4852 C4851
0.1 10 /6.3
T R4858
33k
VREFSEL
R4860
0Ω
EXP1
R4859 0Ω
EXP0
ZOOM01
C1
R4857
FBc
6.8
ZOOM03
C2
Vm4
ZOOM04
D1
R4856 Q4851
FBd
6.8 2SC4617/RS/-X
ZOOM02
D2
Vm3
Vdd
C4863
Vref
R4855
C4862
FILd
1000p
C4861
FILc R4854
1000p
C4860 0Ω
FILb
0.022
C4859
FILa
C4858 0.022
Cosc
68p
LGND
F
Q4804
Q4803
TO OP BLOCK
GND
OP_THRMO
OP_THRMO
FOCUS02
FOCUS02
FOCUS03
FOCUS03
FOCUS04
FOCUS04
FOCUS01
FOCUS01
F_LED
F_LED
F_VCC
F_PTR_AD
F_PTR_AD
ZOOM02
ZOOM02
ZOOM03
ZOOM03
ZOOM04
ZOOM04
ZOOM01
ZOOM01
DAMP+
DAMP+
DRIVE+
HGVss-
HGVss-
HGout-
HGout-
R4874
HGVcc+
0Ω
HGVcc+
GND
DAMP-
DAMP-
HGout+
HGout+
Z_VCC
Z_VCC
Z_PTR_AD
Z_PTR_AD
Z_LED
Z_LED
R4870
270
y20235001a_rev0.1
G