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4.12
OP.DRV SCHEMATIC DIAGRAM
0 1 MAIN (OP.DRV)
TO SYSCON
IRIS_O/C
TO DSP
IRIS_PWM
TO SYSCON
HALL_AD
TO DSP
5
H_GAIN
H_OFFSET
4
L4601
TO REG
10µ
REG_4.8V
NQL302N-100X
C4601
C4602
10
/6.3
0.1
3
GND
L4901
10µ
NQL315K-100X
M_REG4.8
C4914
C4918
10
/6.3
0.1
L4902
10µ
NQR0129-002X
REG_3V
C4915
C4919
10
/6.3
0.1
2
L4903
10µ
NQL315K-100X
130mA
M_REG4.8
C4916
C4917
C4920
10
/10
10
/10
0.1
TO DSP
CAM_VD
F/Z_CS
TO SYSCON
DATA_OUT
CLK_OUT
TO DSP
CLK4M5
TO SYSCON
F/Z_RST
1
∗
NOTE : The parts with marked ( ) is not used.
A
B
R4610
1M
C4605
0.01
100k
R4605
1M
R4609
R4614
4.7k
C4606
0.1
C4604
0.1
C4603
0.1
R4909
R4911
0
R4908
1k
C4913
∗
C
D
4-25
4-26
NOTES :
For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
R4606
R4607
10k
100k
R4616
10k
R4615
R4617
68k
1k
R4608
4.7K
C4609
0.1
R4602
100K
R4623
33k
Q4601
2SC4617/QR/-X
1
R4904
R4903
6R8
6R8
0
P_GND
EXP2
EXP3
EXP1
EXTa
EXP0
Vm1
C1
A1
FBc
FBa
C2
A2
Vm4
Vm2
D1
B1
FBd
FBb
D2
R4910
B2
Vm3
∗
EXTb
Vdd
VD
Vref
R4907
1k
LATCH
FILd
FILd
R4916
1k
SDATA
FILc
FILc
R4917
1k
SCLK
FILb
FILb
R4918
0
OSCin
FILa
FILa
OSCout
Cosc
RESET
GND
C4912
UPD16835AGS-X
∗
IC4901
E
F
TO MAIN IF
CN108
DUMP+
DRIVE+
DUMP-
C4608
R4625
0.1
R4618
1K
∗
R4619
100k
Q4602
2SC4617/QR/-X
R4620
1.5k
C4611
0.01
C4612
0.01
C4607
TO MAIN IF
0.01
CN108
HE_OUT+
HE_IN+
HE_OUT-
R4621
HE_IN-
330k
R4622
150k
TO MAIN IF
CN108
OP_VCC
FOCUS2
FOCUS4
FOCUS3
FOCUS1
R4905
270
ZOOM_LED
R4901
R4902
6R8
6R8
R4906
33k
Q4901
2SC4617/RS/-X
TO MAIN IF
CN108
ZOOM1
ZOOM3
ZOOM4
ZOOM2
C4909
1000p
C4908
R4914
22K
1000p
C4907
0.022
C4906
0.022
C4905
33p
R4915
C4911
1.8K
0.1
y20184001a_rev0.1
G
H
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