Sony DVP-CX777ES Service Manual page 106

DVP-CX777ES
• MB BOARD IC301 CXD9703R (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR)
Pin No. Pin Name
1 VSS
2 to 9 A0 to A7
10 VDD1.8V
11 XINT
12 HCS
13 TESTK0
14 VSS
15 PDM0
16 TESTK1
17 PDM1
18 TESTK2
19 VDD3.3V
20 PDM2
21 TESTK3
22 PDM3
23 VSS
24 XWR
25 XRD
26 XINT
27 XCS
28 XWAIT
29 XMWR
30 XCAS
31 XRAS
32, 33 MDS0, MDS1
34 VDD1.8V
35 VSS
36 to 43 MD0 to MD7
44 VDD3.3V
45 VSS
46 to 53 MD8 to MD15
54 VDD1.8V
55 LOCK
56 DOUT
57 SDCK
58 XSHD
59 XSRQ
60 VSS
61 XRESET
62 VDD3.3V
63 XSAK
64 SDEF
65 to 74 MA0 to MA9
75 VSS
76 VDD1.8V
106
I/O
—
Ground terminal (for digital system)
I
Address signal input terminal
—
Power supply terminal (+1.8V) (for digital system)
O Interrupt signal output to the system controller
I
Chip select signal input from the system controller
I
Input terminal for the test (normally: fixed at "L")
—
Ground terminal (for digital system)
O Tracking coil drive signal output terminal
I
Input terminal for the test (normally: fixed at "L")
O
Tracking coil drive signal output terminal
I
Input terminal for the test (normally: fixed at "L")
— Power supply terminal (+3.3V) (for digital system)
O
Focus coil drive signal output terminal
I
Input terminal for the test (normally: fixed at "L")
O
Focus coil drive signal output terminal
— Ground terminal (for digital system)
I
Write enable signal input from the system controller
I
Read enable signal input from the system controller
O
Interrupt signal output to the system controller
I Chip select signal input from the system controller
O
Wait signal output to the system controller
O
Write enable signal output to the D-RAM
O
Column address strobe signal output to the D-RAM
O
Row address signal output to the D-RAM
O
Spindle motor drive signal output terminal
—
Power supply terminal (+1.8V) (for digital system)
—
Ground terminal (for digital system)
I/O
Two-way data bus with the D-RAM
—
Power supply terminal (+3.3V) (for digital system)
—
Ground terminal (for digital system)
I/O Two-way data bus with the D-RAM
—
Power supply terminal (+1.8V) (for digital system)
O
EFM lock detection signal output terminal Not used
O
Digital audio data output to the AV decoder and audio DSP
O Stream data bus clock signal output to the AV decoder and DSD decoder
O
Stream data bus header flag signal output to the AV decoder and DSD decoder
I
Stream data bus request signal input from the AV decoder and DSD decoder
—
Ground terminal (for digital system)
I Reset signal input from the system controller "L": reset
—
Power supply terminal (+3.3V) (for digital system)
O
Stream data bus acknowledge signal output to the AV decoder and DSD decoder
O
Stream data bus error flag signal output to the AV decoder and DSD decoder
O Address signal output to the D-RAM
—
Ground terminal (for digital system)
—
Power supply terminal (+1.8V) (for digital system)
Description