Protech Systems PROX-1750 User Manual page 92

I/O Address
80h
81h-83h
84h-86h
87h
88h
89h-8Bh
8Ch-8Eh
08Fh
90h-91h
92h
93h-9Fh
A0h-A1h
A4h-A5h
A8h-A9h
ACh-ADh
B0h-B1h
B2h-B3h
B4h-B5h
B8h-B9h
BCh-BDh
C0h-D1h
D2h-DDh
DEh-DFh
F0h
170h-177h
1F0h-1F7h
376h
3F6h
4D0h-4D1h
CF9h
Notes:
1. Only if IDE Standard I/O space is enabled for Primary Drive. Otherwise, the target is PCI.
2. Only if IDE Standard I/O space is enabled for Secondary Drive. Otherwise, the target is PCI.
3. If POS_DEC_EN bit is enabled, reads from F0h will not be decoded by the ICH2. If
POS_DEC_EN is not enabled, reads from F0h will forward to LPC.
Prox-1750G1/G2 USER
Read Target
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
Reserved
DMA Controller
See Note 3
1
IDE Controller
2
IDE Controller
1
IDE Controller
2
IDE Controller
Interrupt Controller
Reset Generator
'
S MANUAL
Appendix B Technical Summary
Write Target
DMA controller &
LPC/PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
FERR# /IGNNE#/
Interrupt Controller
1
IDE Controller
2
IDE Controller
1
IDE Controller
2
IDE Controller
Interrupt Controller
Reset Generator
Internal Unit
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
Processor I/F
DMA
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Power Management
Interrupt
Interrupt
Interrupt
DMA
DMA
DMA
Processor interface
Forwarded to IDE
Forwarded to IDE
Forwarded to IDE
Forwarded to IDE
Interrupt
Processor interface
Page: B-7