Abit AT8 32X User Manual page 44

3-16
Burst Length
DDR SDRAM modules provide a Burst mode that means an auto precharge function for programmable
READ or WRITE burst lengths of 2, 4 or 8 locations.
This means that if we set burst length to 8, the address bus will access 8 bytes each cycle to precharge,
etc.
32 bit Dram Memory Hole:
This item selects the method to remap the 32 bit Dram memory hole. Leave this item to its default "Auto"
Setting.
MTRR mapping mode
The item selects the MTRR mapping mode. The MTRR (Memory-Type and Range Registers) controls
the access and cacheability of memory regions in the processor.
DRAM ECC Feature Control
When installed with the DRAM that support ECC feature, you may select [ECC] option, and then control
the following sub-items.
ECC Memory Interlock
ECC MCE Enable
Chip-Kill Mode Enable
ECC Redirection
DRAM Scrub Rate
L2 Cache Scrub Rate
DCache Scrub Rate
AT8 32X
Chapter 3