Video Ram Cacheable - Abit LM6E Pentium II User Manual

Introduction of BIOS
*EDO DRAM Write Burst:
This option will let you to set the timing for burst mode writes to EDO
DRAM. You can think of this as a write request from the CPU which
needs four separate parts to finish it. The first, provides the writing
location within the DRAM. The remaining three parts will deliver the
actual data. The lower the timing number the faster the system will
address the memory.
DRAM Data Integrity Mode:
Two options are available: Non-ECC or ECC. This option use to
configure the type of DRAM in your system. ECC is Error Checking and
Correction, when your memory is ECC memory, the choose the ECC
option.
CPU-To-PCI IDE Posting:
Two options are available: Enabled and Disabled. When you Enabled
this option, it will allow post write cycles from the CPU to the PCI IDE
interface. IDE accesses are posted in the CPU to PCI buffers. For
optimal result, you should Enabled this option.
System BIOS Cacheable:
You can select Enable or Disable. When you select Enable, you get
faster system BIOS executing speed via the L2 cache.
Video BIOS Cacheable:
You can select Enable or Disable. When you select Enable, you get
faster video BIOS executing speed via the L2 cache.

Video RAM Cacheable:

You can select Enable or Disable. When you select Enable, you get
faster video RAM executing speed via the L2 cache. You must check
your VGA adapter manual to find out if any compatibility problems will
occur.
8 Bit I/O Recovery Time:
Nine options are available: NA $
$ . This option specifies the length of a delay inserted between
Back to NA
consecutive 8 bit I/O operations. For an earlier 8 bit Add-on card,
sometimes you need to adjust its recovery time to make it work normal.
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8 $ 1 $ 2 $ 3 $ 4 $ 5 $ 6 $ 7