Questionable Status Register Set; Calculate[1|2|3|4]:Feedcommand/Query; Display[:Window[1|2|3|4]]:Trace:y[:Scale]:Pdivisioncommand/Query - Agilent Technologies 35670A Manual

Questionable Status Register Set

The Questionable Status register set monitors conditions that affect the quality of measurement data. See
figure 1-9.
Bits in the Questionable Status condition register are set to 1 under the following conditions:
Voltage (bit 0) is set to 1 when one or more enabled bits in the Questionable Voltage event register
are set to 1.
Calibration (bit 8) is set to 1 when the last self-calibration attempted by the analyzer failed.
Limit Fail (bit 9) is set to 1 when one or more enabled bits in the Limit Fail event register are set to 1.
Figure 1-9 also shows the commands you use to read and write the Questionable Status registers. See
chapter 20 for more information about these commands.
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