Core Low Power State Descriptions; Package Low Power States; Coordination Of Core Low Power States At The Package Level - Intel LF80537GF0484M - Cpu Core 2 Duo T7400 2.16Ghz Fsb667Mhz 4Mb Fcpga6 Tray Datasheet

Low Power Features
Figure 2.

Package Low Power States

STPCLK# asserted
Normal
STPCLK# deasserted
† — Deeper Sleep includes the Deeper Sleep state and Intel Enhanced Deeper Sleep state.
Table 1.

Coordination of Core Low Power States at the Package Level

Package State
Core0 State
C0
C1
C2
C3
C4
NOTES:
1. AutoHALT or MWAIT/C1.
2.1.1

Core Low Power State Descriptions

2.1.1.1 Core C0 State
This is the normal operating state for cores in the processor.
2.1.1.2 Core C1/AutoHALT Powerdown State
C1/AutoHALT is a low power state entered when a core executes the HALT instruction.
The processor transitions to the C0 state upon occurrence of SMI#, INIT#, LINT[1:0]
(NMI, INTR), or FSB interrupt messages. RESET# causes the processor to immediately
initialize itself.
Datasheet
SLP# asserted
Stop
Grant
SLP# deasserted
Snoop Snoop
serviced
occurs
Stop
Grant
Snoop
C0
Normal
1
Normal
Normal
Normal
Normal
DPSLP# asserted
Deep
Sleep
Sleep
DPSLP# deasserted
Core1 State
1
C1 C2
Normal Normal
Normal Normal
Normal Stop-Grant
Normal Stop-Grant
Normal Stop-Grant
DPRSTP# asserted
Deeper
†
Sleep
DPRSTP# deasserted
C3 C4
Normal Normal
Normal Normal
Stop Grant Stop Grant
Deep Sleep Deep Sleep
Deeper Sleep
/ Intel®
Deep Sleep
Enhanced
Deeper Sleep
13