Figure 9-32. Initiating An Ultradma Data Out Burst Timing Diagram - AMD Geode SC2200 Data Book

Electrical Specifications
IDE_DREQ0
(device)
IDE_DACK0#
(host)
IDE_IOW0#
(STOP0#)
(host)
IDE_IORDY0
(DDMARDY0)
(device)
IDE_IOR0#
(HSTROBE0#)
(host)
IDE_DATA[15:0]
(device)
IDE_ADDR[2:0]
IDE_CS[0:1]#
Note: The definitions for the IDE_IOW[0:1]]# (STOP[0:1]#), IDE_IORDY[0:1]# (DDMARDY[0:1]) and IDE_IOR[0:1]#
(HSTROBE[0:1]#) signal lines are not in effect until IDE_DREQ[0:1] and IDE_DACK[0:1]# are asserted.

Figure 9-32. Initiating an UltraDMA Data Out Burst Timing Diagram

AMD Geode™ SC2200 Processor Data Book
t
UI
t
t
ACK
ENV
t
ZIORDY
t
LI
t
ACK
t
ACK
32580B
t
UI
t
t
DVH
DVS
415