Dram Clock/Timing Control Menu - Foxconn 661FX7MF series User Manual

Chapter 3 BIOS Description

DRAM Clock/Timing Control Menu

DRAM Timing control (Default: By SPD)
This option determines DRAM timing using SPD or manual configuration.
Only set as manual, the following 4 items can be updated.
DRAM CAS Latency (Default: depend on memory)
This option determines CAS Latency. The available setting values are: 2T, 2.5T,
3T.
RAS Active Time (tRAS) (Default: depend on memory)
This option determines RAS active time. The available setting values are: 4T
- 9T.
RAS Precharge Time (tRP) (Default: depend on memory)
This option is used to define the idle clocks after issuing a precharge com-
mand to the SDRAM.
RAS to CAS Delay (tRCD) (Default: depend on memory)
This option is used to define the minimum RAS to CAS delay using 1us
granularity.
38
661FX7MF/648FX7MF/648C7MF Series User Manual