Intel ® 82093Aa I/O Advanced Programmable Interrupt Controller (Ioapic); Ide Support; I/O Advanced Programmable Interrupt Controller - Intel MS440GX Product Manual

®
Intel 82093AA I/O Advanced Programmable Interrupt
Controller (IOAPIC)
®
The Intel 82093AA I/O Advanced Programmable Interrupt Controller (IOAPIC) provides
interrupt management and incorporates both static and dynamic symmetric interrupt distribution
across all processors in a multiprocessor system. The 82093AA IOAPIC features 24 interrupts as
follows:
13 ISA interrupts
Four PCI interrupts
One Interrupt/SMI# rerouting
Two motherboard interrupts
One interrupt used for INTR input
Three general purpose interrupts
SCI BIOS supported steering

IDE Support

The motherboard has two independent bus-mastering IDE interfaces. These interfaces support PIO
Mode 3, PIO Mode 4, ATAPI devices (e.g., CD-ROM), and Ultra DMA synchronous-DMA mode
transfers. The BIOS supports logical block addressing (LBA) and extended cylinder head sector
(ECHS) translation modes. The BIOS automatically detects the IDE device transfer rate and
translation mode.
The motherboard supports LS-120 diskette technology through its IDE interfaces. LS-120 diskette
technology enables users to store 120 MB of data on a single, 3.5-inch removable diskette. LS-120
technology is backward compatible (both read and write) with 1.44 MB and 720 KB DOS-
formatted diskettes and is supported by Windows
The motherboard allows connection of an LS-120 compatible drive and a standard 3.5-inch
diskette drive. If an LS-120 drive is connected to an IDE connector and configured as the A drive,
and a standard 3.5-inch diskette drive is configured as a B drive, the standard diskette drive must
be connected to the diskette drive cable's "A" connector (the connector at the end of the cable).
The LS-120 drive can be configured as a boot device, if selected in the BIOS setup utility.
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95 and Windows NT operating systems.
Motherboard Features
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