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1.6.1.4
Digital Visual Interface (DVI)
The DVI-D port supports digital DVI displays. The maximum supported resolution is
2048 x 1536 at 75 Hz refresh (QXGA). The DVI-D port is compliant with the DVI 1.0
specification.
1.6.2
USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The ICH10D provides the USB controller for all ports. The port arrangement is as
follows:
•
Four ports are implemented with stacked back panel connectors
•
Four ports are routed to two separate front panel USB headers
For information about
The location of the USB connectors on the back panel
The location of the front panel USB headers
1.6.3
Serial ATA Interfaces
The board provides two Serial ATA (SATA) connectors, which support one device per
connector. The board also provides one red external Serial ATA (eSATA) connector.
1.6.3.1
Serial ATA Support
The board's Serial ATA controller offers three independent Serial ATA ports with a
theoretical maximum transfer rate of 3 Gbits/sec per port. One device can be installed
on each port for a maximum of three Serial ATA devices. A point-to-point interface is
used for host to device connections, unlike Parallel ATA which supports a master/slave
configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard PCI Conventional bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP and
Windows Vista operating systems.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adapters or
power supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/.
For information about
The location of the Serial ATA connectors
Product Description
Refer to
Figure 9, page 43
Figure 10, page 44
Refer to
Figure 10, page 44
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