Table of Contents
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Tables
1-1
References ....................................................................................................... 11
2-1
Voltage Identification Definition........................................................................... 15
2-2
Market Segment Selection Truth Table for MS_ID[2:0] ........................................... 17
2-3
Signal Groups ................................................................................................... 18
2-4
Signals with ODT............................................................................................... 19
2-5
PECI DC Electrical Limits .................................................................................... 20
2-6
Processor Absolute Minimum and Maximum Ratings ............................................... 22
2-7
Voltage and Current Specifications....................................................................... 23
2-8
VCC Static and Transient Tolerance ..................................................................... 24
2-9
VTT Voltage Identification (VID) Definition ............................................................ 25
2-10 VTT Static and Transient Tolerance ...................................................................... 26
2-11 DDR3 Signal Group DC Specifications................................................................... 27
2-12 RESET# Signal DC Specifications ......................................................................... 28
2-13 TAP Signal Group DC Specifications ..................................................................... 28
2-14 PWRGOOD Signal Group DC Specifications............................................................ 28
2-15 Control Sideband Signal Group DC Specifications ................................................... 29
2-16 VCC Overshoot Specifications.............................................................................. 29
3-1
Processor Loading Specifications ......................................................................... 34
3-2
Package Handling Guidelines............................................................................... 34
3-3
Processor Materials............................................................................................ 35
4-1
Land Listing by Land Name ................................................................................. 37
4-2
Land Listing by Land Number .............................................................................. 52
5-1
Signal Definitions .............................................................................................. 67
6-1
Processor Thermal Specifications ......................................................................... 72
6-2
Processor Thermal Profile ................................................................................... 73
6-3
Thermal Solution Performance above TCONTROL ................................................... 74
6-4
Supported PECI Command Functions and Codes .................................................... 81
6-5
GetTemp0() Error Codes .................................................................................... 81
6-6
Storage Conditions ............................................................................................ 82
7-1
Power On Configuration Signal Options................................................................. 83
7-2
Coordination of Thread Power States at the Core Level ........................................... 84
7-3
Processor S-States ............................................................................................ 86
8-1
Fan Heatsink Power and Signal Specifications........................................................ 93
8-2
Fan Heatsink Power and Signal Specifications........................................................ 95
Datasheet
5
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