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Operation
Mnemonic
Op
Code
Format
Operands
Description
Interruptions
Cond code
Start 1/0
SIO
9C
SI
Dl(Bl)
Opr 1 (21-31) identifies the selected chan,
Privileged
O=I/0 oper
ctl unit and I/O device to perform write,
op er
initiated
read, read bkwd, control or sense oper.
l=CSW
store~
The CAW at loo 48 is fetched, which
2=Chan or ctl
locates the first CCW.
unit busy
The SIO is initiated providing the addressed
3=Not
chan, ctl unit and 1/0 device are available
operational
without pending interrupt errors,
exceptional conditions pending.
Store
ST
50
RX
Rl, D2(X2, B2)
Opr 1 is stored into opr 2
Prot
Unchanged
Adr
Spec
Store Character
STC
42
RX
Rl, D2(X2, B2)
Opr 1 (24-31) replaces the character at
Prot
Unchanged
opr 2's address.
Adr
Store Halfword
STH
40
RX
Rl, D2(X2, B2)
Opr 1 (16 low-order bits) is stored at
Adr
Unchanged
opr 2's location.
Prot
(Hi-order bits ignored and unchanged)
Spec
Store (Long)
STD
60
RX
Rl, D2(X2, B2)
FP. opr 1 to opr 2's location
Adr
Unchanged
Prot
Spec
Store Multiple
STM
90
RS
Rl,R3,D2(B2)
Opr 1 thru opr 3 are stored at opr 2's
Adr
Unchanged
location in ascending order. Starting reg
Prot
specified by opr 1, ending reg specified
Spec
by opr 3.
(Reg wrap-around possible)
Store (Short)
STE
70
RX
Rl, D2(X2, B2)
FP. opr 1 is stored at opr 2's location.
Adr
Unchanged
(Low-order FPR ignored and w10hanged)
Prot
Spec
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