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NVMe SMBus Headers
NVMe SMBus (I
C) header (JNVI2C1), used for PCIe SMBus clock and data connections,
2
provides hot-plug support via a dedicated SMBus interface. This feature is only available for
a Supermicro complete system with an Supermicro proprietary NVMe add-on card and a
proper cable installed. See the table below for pin definitions.
NVMe VPP Bus Connector
A NVMe VPP Bus connector is located at JNVVPP1 on the motherboard. The NVMe VPP
connector provides hot plug support for the NVMe devices, which will allow the user to replace
NVMe devices without shutting down and powering off the system. Refer to the layout for
the location of JNVVPP1.
AIOM-A
JMCIO-RA1
MH14
BMC
JPW1
JPW2
PSU1
PSU2
1
PWR1
P12V
BATTERY
BT1
GPU-PWR1
GPU-PWR3
GPU-PWR5
GPU-PWR7
GPU-PWR9
MH3
JFP2
GPU-PWR2
GPU-PWR4
GPU-PWR6
GPU-PWR8
GPU-PWR10
2
P1-PCIE3B
P1-PCIE3A
P1-PCIE2B
P1-PCIE2A
P1-PCIE1B
P1-PCIE1A
JIPMB1
J35
JS1
FAN9
MH10
JBT1
X13DEG-OA
MAC CODE
REV:1.01
DESIGNED IN USA
LED6
JF1
CPU1
LEDPWR
FAN1
FAN2
FAN3 FAN4
MH12
MH5
NVMe SMBus Header
Pin Definitions
Pin#
Definition
1
Data
2
Ground
3
Clock
4
VCCIO
JAIOM1
AIOM PCIE 5.0X16
AIOM-B
JMCIO-RA2
MH9
LEDBMC
PCIE 3.0X2
PCIE 3.0X2
JPW3
JM2_2
M.2-P2:
JM2_1
M.2-P1:
PSU3
JNCSI1
GPU-PWR15
GPU-PWR11
GPU-PWR13
GPU-PWR17
GPU-PWR12
GPU-PWR14
GPU-PWR16
GPU-PWR18
MH16
MH18
P2-PCIE3B
P2-PCIE3A
P2-PCIE2B
P2-PCIE2A
P2-PCIE1B
P2-PCIE1A
JS2
STBY_PWR
MH2
MH15
MH17
LED4
LED7
CPU2
JMCIO9A
JMCIO9B
P2-PCIE4A
P2-PCIE4B
MH6
89
1. NVMe I
JPW4
PSU4
2. VPP I
C Header (JNVVPP1)
2
P12V
GND
GPU-PWR19
MH13
JPW26
JPW23
GPU-PWR20
JPW25
JPW22
JPW24
JPW21
FAN10
MH7
Chapter 2: Installation
C Header (JNVI2C1)
2
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