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10.2.7
Paper Feed
Motor
Drive
Circuit
The Paper Feed
motor is a four-phrase uni-polar
PM
type stepping motor.
The motor
drive circuit receives
its signals from
P64-67
of the CPU.
These
signals are
L
level and are
sent
to the driver (IC107) which is
a M54532.
This
driver contains 4 NPN Darlington transistors with clamp diodes. When the CPU sends the
signals for the Motor to step, the transistors are turned on in a given sequence.
Once the motor has finished stepping all the
transistors
are turned off and no current flows to the motor,
because
P64-67
of the CPU become
L
levels.
Circuit Diagram
CPU
P64
29
P65
30
P66
31
P67
32
Timing
Chart
P64
I
I
P65
I
I
I
I
I
I
I
I
I
P66
J
I
P67
J
14
11
3
6
IC107
r--------------,
CN107
r----,
2
6
16
15
4
I
10
I
9
3
I
I
I
I
: 7
,'
C103
r',,
5
I
I
I
1
I
(.
________
_____
,
8,1
+
9V
-
34
-
0
Paper Feed Motor
I
L
(
'
~
fr
'
f
'
t
/'
,,
'
10.2.8 Correction
Motor
Drive Circuit
The
Correction motor is a Small
Direct
Current Motor.
The
motor drive circuit receives its signals from LIUP and LIDW of
_
t he Gate Array (IC104).
These
signals are sent to the driver (IC103) or
[IC113]
which is a
BA6208
.
This
driver
is a bi-directional
motor driver with brake function. When one of the two signals is H, the driver moves the motor. The direction
in
which the motor will move is controlled by an H
level
state on either
LIUP
or LIDW of IC104.
At the beginning of a correction operation, pin
®
and pin
@
of (IC103) or [IC113] are at L and H levels
respectively, the driver rotates the motor, and the ribbon
is
lifted up. At the end of the correction operation
,
pin
®
and pin
@
of (IC103) or [IC113] are at Hand L levels
respectively
,
the driver reverses the direction
of
the
motor and the ribbon is lowered.
The running
time of the motor is controlled by software.
Once the motor has finished running, no current flows to the motor, because
LIUP-LIDW
of IC104 become
L
level.
+9V
Circuit Diagram
(IC113)
10.2.9
IC104
[IC103]
Vee
6
CN111
LIDW
29
2
7
LIUP
30
3
8
1:
I
I
Correction Motor
I
I
L
___
J
(
)=KX-W50TH
[
]=
KX-W60TH
LCD
Circuit Block
The LCD
on the KX-W50TH is capable of displaying 15 (5x7 dot matrix) characters. The LCD on the KX-
W60TH is capable of displaying 23 (5x7 dot matrix) characters. Three of the 23 characters
act as a
3 digit
decade counter which indicate the number of characters that can be input on the current typing line.
Immediately after the power switch is turned on, the
LCD
is initialized by the CPU.
Instructions
and
?ata
are sent from the CPU to the LCD through the Data Bus.
The
state of RS determines
whether the
transmitted
signal is data or
instruction
.
The
state of the
LCD
(busy or ready) is monitored by the CPU through the Data Bus.
It
is monitored
when
R/W
and
E are both H levels.
Block Diagram
+
5V
LCD
CPU
-2V
CONTRAST
A
I
Data Bus
(Do
~D
1
)
'i
R/W
Ao
IC104
E
39
{>-
78
-
35
-
't__
Voo
Vo
I
R/W
RS
E
II
=
RS
L"
:
Instruction
RS=" H":
Data
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