IBM 1620 1 Manual page 30

Core Storage Loco; ions
01590_01599
Instruction
Before
Iv'p
I
Ep
I
Mq
I
Eq
OP
I
P
I
Q
7891"031456101
o
310 1 5 9 410 1 5 9 9
Figure 26. Product Equal to 2L
Execution Time. T (average)
168L2 JLsec.
Core Storage Locations
01590_ 01599
Instruction
Before
Iv'p
I
Ep
I
Mq
I
Eq OP
I
P
I
Q
i
2 310 2\4 5 610 4
o
310 1 5 9 410 1 5 9 9
Figure 27. Product Less than 2L
Floating Divide (FDIV-09)
Core Storage Locations
01590_01599
After
Iv'p
I
Ep
I
Mq
I
Eq
3
5 910 214 5
elo
1
1120
+
80L
+
Core Storage Locations
01590_01599
After
Iv'p
I
Ep
I
Mq
I
Eq
"5
6 0
Iii
514 5 6\
0
4
Descl'iption. Mp is divided by Mq, and the quo-
tient replaces Mp. Eq is deducted from Ep, and
the result replaces Ep. Mp and Ep are normalized,
as required, after division; Mq and Eq are not al-
tered in core storage. The quotient and remainder
are developed in the product area, beginning at
00099 and extending through lower-numbered core
storage positions to 00100 - 2L. The product area,
00080-00099, is cleared automatically prior to divi-
sion. If L is greater than 10, the program must pro-
vide for c1earing positions 00100 - 2L through 00079.
Prior to division, the absolute values of Mp and Mq
are compared. IfIMpiis equal to or greater than IMql,
Mp is transmitted to 00100 - L, and division is per-
formed, starting at 00100 - L, according to the pro-
cedure for automatic division. The quotient at
00099 - L replaces M p, and Ep - Eq + 1 replaces
Ep (Figure 28). If IMpl is less than IMql, Mp is trans-
mitted to 00099 - L; division starts in 00100 - L,
and proceeds according to the procedure for auto-
matic division. The quotient at 00099 - L replaces
Mp, and Ep - Eq replaces Ep (Figure 29).
Core Storage Locations Core Storage Locations
01590_ 01599
Instruction
01590--01599
Before
After
Iv'p
I
Ep
I
Mq
I
Eq OP
I
P
I
Q
Iv'p
I
Ep
1
Mq
I
Eq
7'
8 910 411 2 310 1
o
910 1 5 9 410 1 5 9 9
6
4 110 41i 2 310 1
Figure 28. Divisor Equal to or Less than Dividend
26
Core Storage Locations
Core Storage Locations
01590-- 01599
Instruction
01590--01599
Before After
Iv'p
I
Ep
I
Mq
I
Eq OP
I
P
I
Q
Iv'p
I
Ep
I
Mq
I
Eq
i
2 3rO 117 8 910 4
o
910 1 5 9 410 1 5 9 9
i
5 510
'3\7
8 910 4
Figure 29. Divisor Greater than Dividend
Division by zero causes the Arithmetic Check in-
dicator (code 14) to be turned on. M p is not altered,
but Ep is replaced by Ep - Eq.
Execution Time. T
==
880
+
940L
+
520L2 JLsec.
The formula is based on an average quotient digit
of 4.5.
Floating Shift Right (FSR-OS)
Description. The field at the
Q
address (the por-
tion of the mantissa to be retained) is shifted right
to the location specified by the P address. The ex-
ponent is not moved or altered. The effect of this in-
struction is to shrink the mantissa by shifting it to
the right and truncating the low-order digits. The P
address is normally the units position of the mantissa;
the digit .at the
Q
address becomes the new low-
order digit of the mantissa. Vacated high-order po-
. sitions are set to zeros. An existing flag bit at the
P address is retained for algebraic sign; the field
flag bit is transmitted with the high-order digit of
the Q field and terminates the operation (Figure 30).
The P address should always be greater than the
Q
address; a P address less than or equal to the
Q
address will cause errors.
Execution Time. T
=
200 +40L.
Core Storage Locations Core Storage Locations
01590_01599
Instruction
01590--01599
Before
After
Iv'p
I
Ep
I
Mq
I
Eq OP I
P I
Q Iv'pIEPIMqIEq
o
1 210 217 8 91 0 5
o
810 1 5 9 710 1 5 9 6
o
1 210 210 7 810 5
Figure 30. Floating Shift Right
Floating Shift Left (FSL-OS)
Description. The field at the Q address, which is
the low-order position of the mantissa, is shifted left
so that the high-order digit is moved to the location
specified by the P address. The exponent is not moved
or altered. The effect of this instruction is to expand
the mantissa by shifting it to the left and filling
the vacated positions with zeros. It is important to
note that the
Q
address is the low-order position of
the field moved, and the P address is the high-order