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FS-SD5R/FS-SD7R/FS-SD9R
™ UPD780024AGKA11 (IC701) : CPU
2-16
1. Pin layout
oD
K
2
aN
(fe)
48
33
7
~
832
—_
2. Block diagram
16-bit TIMER/
EVENT COUNTER
8-bit TIMER/
EVENT COUNTERSO
8-bit TIMER/
EVENT COUNTERS1
i
WATCHDOG TIMER
WATCH TIMER
SERIAL
INTERFACE3O
SERIAL
INTERFACE31
UARTO
A/D CONVERTER
INTERRUPT
CONTROL
BUZZER OUTPUT
CLOCK OUTPUT
CONTROL
oH:
u
Go
Eee
Th
u
VDDO VDD1 VssO
Vsst
IC
|
Ki
PORTO
Ki
PORT!
K—
PORT2
K
{
PORTS
Ko
PORT7
EXTERNAL
ACCESS
SYSTEM
CONTROL
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