Pioneer DVL-90 Service Manual page 95

DVL-90, DVL-700
li PD0236AM (CLD MAIN ASSY : IC202)
@ HI-BIT IC
@ Block Diagram
Timing
Data
Data
discrimination
sector
Discrimination data
delay sector
Coefficient
storage ROM
@ Pin Function
[ No. [Pin Name] VO |
BCSEL | Ip_ | fs selection of bit clock (built-in pull-up) H : BCKI = 48fs , L: BCKI = 64fs
DASEL Output data length selection when the bit length expansion function is ON.
H :DATAO = 20 bit , L: DATAO = 24 bit
| 3 (nc) | = | Not used (Open or VDD)
4 I|LRSEL LRCKO polarity selection (built-in pull-up)
| § |LRCKO | O | LR clock output
| 6 j(NC) | - | Not used (Open or VDD)
| 7 |BCKO | O | Bit clock output
[8 _[oatao [0 [Oeeomt SSCS
[eno | - [Gmmdpn
10 [woo [= |Powersuppivn SSCS
Tt _[inek [1 [tReeckinst SSCS
12 [oy | [Notused (OpenervOD) SSCS
13 [ino | — [Notused (OpenervOD) SSCS
fia foata [1 [osama OOOSOSOCOCOCOCSCSCSCSCSCSC'"CSC~C~*S
16 [Bont [1 [atceckinpt ——SSSSCSCSCSCSCSCSCSCSCSCSCSCSCSCSCSCSCSSSC*d
[16 [noy | = [Notused OponervOO)—OSOSOSCOCOCSCSCSCSCSSCSC*S
Bit length expansion process / input data output selection (built-in pull-up)
H :Expansion process (output word length : 20/24 bit), L: Input data output
Pie [wast [1 [Resetpin HeNomel tiReset SS SSOCSCSCSCSCSCSCSCSC*
H:LRCKI=LRCKO , L: LRCKI =LRCKO
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