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Maintenance
Timer Interrupt Test
The third portion of the self-test program checks to determine that a timer interrupt occurs. This test
includes a timing routine that executes in 12 milliseconds. During that interval, a timer interrupt should
have occurred. This test does not check the accuracy of the timer, but rather it verifies that the interrupt
has actually occurred. At the start of the test, LEDs 5 and 6 are lighted. At the successful completion of
the test, LED 3is lighted and LEDs 5 and 6 are turned off.
If
the test fails, LEDs 5 and 6 are left on.
RAM Test
The fourth portion of the self -test program is the RAM Test, which consists of two routines. In the first
routine, each memory location has its address written into it and then read from it, starting at location
0001 and progressing to 3FFF. The second routine fills memory downward with the complement of the
address and reads it upward. LED indicator 3 is lighted at the start of the test.
If
the test is successful,
LED indicator 4 is lighted and indicator 3 is turned off.
If
it fails, LED indicator 3 stays lit.
Chip Tests
The fifth portion of the self-test program performs tests on the remaining portions of the PCA board,
namely the communication chips and the I/O controllers. LED indicator 4 is lighted at the start of these
tests. As each individual test in this group is completed, the LEDs are incremented.
If
all of the tests are
successful, LEOs 0 and 7 are lighted. If anyone fails, the tests are not halted, but the appropriate LEDs
are lighted.
BISYNC TEST. The first part of the Universal Synchronous/Asynchronous Receiver/Transmitter
(BISYNC) Test sets up the communications interface and then transmits and receives 100 data characters.
Errors detected will be data overruns, data parity errors, and any differences between data transmitted
and data received.
The second part of the BISYNC Test takes the data written in low memory and transmits it to higher
memory via the BISYNC chip and DMA. At the successful completion of this test, LED indicator 5 is
lighted.
SDLC TEST. The first part of the Universal Synchronous Receive and Transmit (SDLC) Test sets up the
communication interface and then transmits and receives 100 data characters. Errors detected will be
receive errors, receive overruns, and receive aborts.
The second part of the SDLC Test takes the data written in low memory and transmits it to higher
memory via the SDLC chip and DMA. At the successful completion of this test, LED indicator 5 is
turned off.
If
it fails, LED indicator 5 is left on.
5-4
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Table of Contents
Troubleshooting
