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tWRWR_dg
Configure between module write to write delay.
tWRWR_dr
Configure between module write to write delay.
tWRWR_dd
Configure between module write to write delay.
Round Trip Timing
Round Trip Timing Optimization
Auto is enabled in general case.
Rx FiF0 Delay Offset
Configure Rx FIF0 Delay Offset.
Initial RTL
Configure round trip latency initial value.
RTL (A1 Rank1)
Configure round trip latency.
RTL (A1 Rank2)
Configure round trip latency.
RTL (B1 Rank1)
Configure round trip latency.
RTL (B1 Rank2)
Configure round trip latency.
ODT Setting
ODT WR (A1)
Configure the memory on die termination resistors' WR for channel A1.
ODT WR (B1)
Configure the memory on die termination resistors' WR for channel B1.
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