Hp-Ib Block; Hp-Ib Block Circuit Description - HP 5334B Service Manual

8-206. HP-IB BLOCK
8-207. The HP-IB Block handles all the HP-IB interfacing between the HP 5334B and an external controller.
Commands from the controller are decoded and sent to the Executive MCU, and output data from the Execu-
tive MCU
is
formatted and sent back to the controller.
8-208. The components of the HP-IB Block are the HP-IB Microcomputer (MCU) U17, two transceivers (U6
and U7), and several discrete gates along with associated parts. The HP-IB MCU is programmed to handle all
HP-IB interface functions. The three TTL logic Integrated Circuits U8, U9, and U10, are used to speed the
detection and response to particular HP-IB control lines. The two transceivers drive the DATA lines and the
HANDSHAKE lines. The Service Request (SRQ) status line is controlled by the HP-IB MCU through Q3.
8-209. The HP-IB MCU has four &bit UO ports, for a total of 32 UO lines. Eight lines are used to communi-
cate over the Executive Data Bus. Another eight lines are used for communication over the HP-IB. The remain-
ing 16 lines are used for controlling and monitoring functions.
8-210. The &line Executive Data Bus connects HP-IB MCU U17 to Executive MCU U19, which controls the
overall operation of the Counter. The second &line bus, the HP-IB Bus, connects the HP-IB MCU to an exter-
nal controller for remote operation.
8-211. HP-IB uses a Low-True Logic Convention. A TRUE condition is a TTL LOW and a FALSE condition
is a TTL
HIGH.
8-212. HP-IB Block Circuit Description
8-213. The function of this circuit is to interface between the HP-IB and the Executive MCU. There are several
HP-IB functions that require a faster response than the HP-IB MCU can provide. These functions are
REMOTE ENABLE (REN), INTERFACE CLEAR (IFC), and ATTENTION (ATN). They are the reasons
for most of the discrete components in the HP-IB Block.
8-214. U8 is configured as two latches. The REMOTE ENABLE (REN), INTERFACE CLEAR (IFC) lines
are connected to these latch circuits which hold the information until the MCU software can read them. The
latches are cleared within lms after they are set.
8-215. U9 and U10 allow the HP 5334B to respond quickly to the ATTENTION (ATN) and INTERFACE
CLEAR (IFC) lines since the MCU is too slow to detect the lines directly. When ATN goes TRUE (0 volts), the
Counter immediately releases control of the HP-IB DATA and HANDSHAKE lines and goes into the acceptor
handshake mode whereby it will remove the data and handshake signals from the bus within 200 ns. This is ac-
complished using the discrete gates of U9 and U10 which set both U6 and U7 to receive. When IFC goes TRUE
(0 volts), control of the data and handshake lines is relinquished to the external controller as all activity on the
HP-IB is halted. Diodes CR6,7, and 10 provide protection from negative voltage spikes on the IFC, REN, and
ATN lines. Diode CR9 protects the SRQ output from going negative.
8-216. TTL voltages from U9 and U10 control the direction of data transfer through U6, an 8-line, 3-state
bidirectional transceiver and through U7, a Cline, 3-state bidirectional transceiver.
8-217. U6 DATA lines are control by the Transmit and Receive (T/R) limes and the Chip Disable (CD) line. A
pull-up voltage of
+
3V is provided for these lines through CR4 and resistor-package R5.
HP 5334B
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Service Manual
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