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MAIN(REG) SCHEMATIC DIAGRAM
0
1
MAIN(REG)
BATT+
GBAT
To MAIN IF(CN103)
VADP
GADP
GND
To MAIN IF(CN103)
UNREG
OPEN
C6009
To MAIN IF(CN103),
ADP_L
CPU
GND
C6010
OPEN
R6010
OPEN
OPEN
D6002
To MAIN IF(CN103)
BATT_CHK
R6011
82k
0.5%
V_BATT
R6012
C6011
33k
0.5%
OPEN
To CPU
R6021
150k
0.5%
UNREGCHK
R6022
C6013
39k
OPEN
0.5%
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
C6001
1
C6706
1500p
R6014
100k
R6015
OPEN
IC6001
FA7736AF
GND
VCH9
C6002
1
VCC0
C6003
1
VREG
FB9
C6902
R6902
C6901
R6901
3900p
1k
1000p
4.7k
IN9-
C6502
R6502
C6501
R6501
0.033
6.8k
0.047
2.7k
FB5
R6503
0.5%
110k
0.5%
R6504
IN5-
OPEN
R6505
10k
0.5%
FB2
IC6001
IN2-
C6302
R6302
C6301
R6301
FA7736AF
1500p
0Ω
220p
8.2k
FB3
R6304
R6303
7.5k
0.5%
47k
IN3-
0.5%
C6402
R6402
C6401
R6401
1500p
0Ω
330p
8.2k
FB4
R6403
18k
0.5%
R6404
20k
IN4-
0.5%
R6405
0.5%
120k
C6102
R6102
C6101
R6101
1500p
0Ω
220p
3.6k
FB1
R6103
R6107
18k
300
IN1-
0.5%
0.5%
R6104
R6004
10k
47k
0.5%
0.5%
RDT
C6103
1
C6104
C6403
10
1
(No.YF259<Rev.001>)2-17
R6701
OPEN
C6701
4700p
DATA
R6009
100k
CLK
CS
C6007
OPEN
RST
C6006
0.1
OUT7S
OUT6S
OUT6P
C6005
1
VCC6
C6004
OPEN
VCC2
OUT2N
OUT2P
PGND5
L6901
47µ
D6901
NQL79GM-470X
KDR412-X
OUT9
F6003
0
VCC9
C6903
1
VCC5
C6504
C6503
1
1
OUT5
D6501
1SS355-X
D6502
1SS355-X
C6506
1
C6303
1
C6404
C6304
10
10
C6507
D6503
1
1SS355-X
D6504
1SS355-X
C6505
1
2-18(No.YF259<Rev.001>)
R6008
0Ω
IC6002
OPEN
DET
VSS
OUT
R6016
OPEN
C6012
OPEN
2.2k
Q6901
R6907
2SC4617/RS/-X
L6701
Q6701
Q6702
47µ
KMB3D0P30SA-X
KMB3D0P30SA-X
R6716
NQL52EM-470X
0.2
0.25W
D6702
NRV142F-R20X
Q6703
MA22D23-X
KMB3D0P30SA-X
C6705
R6714
10
1M
C6704
1
C6708
10
R6715
1M
IC6004
S-1112B28MC-X
C6905
1
VIN
VOUT
VSS
C6906
1
ON/OFF
NC
R6903
OPEN
L6502
10µ
NQL38DK-100X
Q6504
OPEN
3
6
R6513
5
2
OPEN
1
Q6503
4
Q6505
OPEN
OPEN
C6510
1
R6512
OPEN
R6510
C6509
OPEN
C6513
C6508
OPEN
D6505
OPEN
OPEN
UDZS8.2B-X
1
4
R6524
150k
2
5
R6523
Q6502
0Ω
6
3
OPEN
R6522
Q6506
6.8k
2SA1774/RS/-X
R6509
OPEN
R6511
OPEN
yf259_y10761001a_rev0.1
AL_2.8VCTL
DC_CHECK
CHRG_EVR
I_MTR
To CPU
REG_OUT
REG_CLK
REG_CS
REG_RSTL
REG_4.9V
AL_2.8V
REG_LCD
To DSP
REG+CCD
To CDS/TG
REG-CCD
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