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6 I/O PORTS (PPORT)
Peripheral I/O function 0 I/O control
Peripheral I/O function 1 I/O control
Peripheral I/O function 2 I/O control
Peripheral I/O function 3 I/O control
Clock
generator
Key-entry
reset signal
System reset
controller
Interrupt
controller
6.2 I/O Cell Structure and Functions
Figure 6.2.1 shows the I/O cell Configuration.
Pull-up/down
Control signal
Input signal
Input control signal
Output signal
Output control signal
LCD/analog signal
Analog control signal
Over voltage tolerant fail-safe type I/O cell
6-2
PPORT
Pxy
Pxy
Pxy
PxSELy
PxyMUX[1:0]
PxOUTy
PxOENy
PxIENy
PxPDPUy
PxRENy
PxCHATENy
CLKSRC[1:0]
PxINy
CLKDIV[3:0]
DBRUN
CLK_PPORT
Key-entry
PxEDGEy
reset control
circuit
PxINT
PxIFy
KRSTCFG[1:0]
PxIEy
Figure 6.1.1 PPORT Configuration
V
DD
Pull-up/down
control
R
/
V
INU
SS
R
IND
V
DD
∗ No diode is
connected at
V
the V
side.
DD
DD
Analog signal
V
SS
control
Output signal
Output control signal
I/O cell for LED drive pin
Figure 6.2.1 I/O Cell Configuration
Seiko Epson Corporation
GPIO/
peripheral I/O
GPIO function
function
switching
General-purpose
circuit
I/O control
Chattering
filter
Interrupt
control circuit
Exist only in the ports that supports the interrupt function.
Pull-up/down
Control signal
Input signal
Input control signal
Pxy
Output signal
Output control signal
LCD/analog signal
Analog control signal
Standard I/O cell
V
DD
V
SS
V
SS
I/O cell
control signal
Output signal
I/O cell
Input signal
V
DD
Pull-up/down
control
R
/
V
INU
SS
R
IND
V
DD
V
DD
V
DD
Analog signal
V
SS
control
Pxy
S1C17W12/W13 TECHNICAL MANUAL
Pxy
Pxy
(Rev. 1.2)
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