Schematic, Pcb Layout, And Bill Of Materials; Schematic; Data Logging Setup And Enable; Opt3002 Test-Board Schematic - Texas Instruments OPT3002EVM Operation Manual

Schematic, PCB Layout, and Bill of Materials

There is a data logging feature included in the software that recorda the date and time from the host
computer, along with the measured value reported by the device. After a destination file is selected by
clicking Select a File/Path, as shown in
data to that file in .tab format.
4 Schematic, PCB Layout, and Bill of Materials
4.1

Schematic

Figure 19 shows the complete schematic of the OPT3002 test board. SDA and SCK are pulled up by the
SM-USB-DIG Platform; therefore, there are no pull-up resistors present on the board. R2 is a pull-up
resistor for the interrupt signal, C1 is a bypass capacitor for VDUT, and R4 is a jumper to tie the address
pin to ground. If another address is desired, remove R4 and install a wire to the pad or via, and then to the
appropriate signal source.
SCK
INT
SDA
VDUT
GND
VDUT
GND
The OPT3002 is mounted on the back side of the board; therefore, the LED light from the SM-USB-DIG is
directed away from the device. Also, no additional LEDs are installed on the test board in order to reduce
total ambient light around the device. The back side of the board is mostly planar; mounting holes are
included to accommodate evaluation.
12
OPT3002EVM User's Guide
Figure 18, turn on the Logging On/Off selector switch to append
Figure 18. Data Logging Setup and Enable
J2
1
2
3
4
5
1
VDD
ADDR
C1
0.1µF
U1
Figure 19. OPT3002 Test-Board Schematic
Copyright © 2016, Texas Instruments Incorporated
J1
1
2
3
GND
4
5
VDUT
6
7
8
SDA
9
INT
10
SCK
R1 R2 R3
DNP DNP
10k 10k 10k
4
SCL
6
SDA
5
INT
2
R4
0
3
GND
7
PAD
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SCK
SDA
INT
SBOU160 – May 2016
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