Pioneer VSX-84TXSi Service Manual page 310

1
A
No. Pin Name I/O
21 P10 I
22 P9 O
23 P8 O
24 P27 I/O
25 P7 O
26 P6 O
27 P5 O
28 P4 O
B
29 P26 I/O
30 P25 I/O
31 P24 I/O
32 P23 I/O
33 P22 I/O
34 P21 I
35 DCLK_IN I
36 LLC1 O
37 XTAL1 O
C
38 XTAL I
−
39 DVDD
−
40 DGND
41 P3 O
42 P2 O
43 P1 I
44 P0 I
45 P20 I
D
46 ELPF O
−
47 PVDD
−
48 PVDD
−
49 AGND
−
50 AGND
−
51 AGND
52 SOG I
53 AIN7 I
E
54 AIN1 I
55 AIN8 I
56 AIN2 I
57 AIN9 I
58 AIN3 I
−
59 NC
−
60 AGND
F
264
1
2
Function
Video pixel input port
Video pixel output port
Video pixel output port
Video pixel input/output port
Video pixel output port
Video pixel output port
Video pixel output port
Video pixel output port
Video pixel input/output port
Video pixel input/output port
Video pixel input/output port
Video pixel input/output port
Video pixel input/output port
Video pixel input port
Clock input signal
Line-locked output clock for the pixel data output
27MHz crystal connect pin
Input pin for 27MHz crystal
Digital core supply voltage (1.8V)
Digital ground
Video pixel output port
Video pixel output port
Video pixel input port
Video pixel input port
Video pixel input port
The recommend external loop filter must
be connected to this pin
PLL supply voltage (1.8V)
PLL supply voltage (1.8V)
Analog ground
Analog ground
Analog ground
Sync on green input
Analog video input channel
Analog video input channel
Analog video input channel
Analog video input channel
Analog video input channel
Analog video input channel
No connect pin
Analog ground
VSX-74TXVi
2
3
No. Pin Name I/O
61 CAPY1 I ADC capacitor network
62 CAPY2 I ADC capacitor network
−
63 AVDD Analog supply voltage (3.3V)
64 REFOUT O Internal voltage reference output
65 CML O Common-mode level pin for the internal ADCs
−
66 AGND Analog ground
67 BIAS O External bias setting
68 CAPC1 I ADC capacitor network
69 CAPC2 I ADC capacitor network
−
70 AGND Analog ground
71 AIN10 I Analog video input channel
72 AIN4 I Analog video input channel
73 AIN11 I Analog video input channel
74 AIN5 I Analog video input channel
75 AIN12 I Analog video input channel
76 AIN6 I Analog video input channel
77 SOY I Sync on luma input
78 RESET I System reset input
79 DE_IN I Data enable input signal
Selects the I2C address for the
80 ALSB I
ADV7400A control and VBI readback port
81 SDA1 I/O I2C port serial data input/output
82 SCLK1 I I2C port serial clock input (max 400kHz)
83 P40 I Video pixel input port
84 P39 I Video pixel input port
85 VS_IN I VS input signal
Can be configured in CP mode to be
either a digital HS input signal or a digital
86 HS_IN/CS_IN I
CS input signal used to extract timing in
5-wire or 4-wire RGB mode.
87 P38 I Video pixel input port
88 P37 I Video pixel input port
−
89 DGND Digital ground
−
90 DVDD Digital core supply voltage (1.8V)
91 P19 O Video pixel output port
92 P18 O Video pixel output port
93 P17 O Video pixel output port
94 P16 O Video pixel output port
95 P36 I Video pixel input port
96 P35 I Video pixel input port
97 P34 I Video pixel input port
98 FIELD/DE O Field sync signal output/data enable
99 VS O Vertical sync output signal
100 P33 I Video pixel input port
3
4
Function
4