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PCB Layout
4 PCB Layout
Figure 4-1
through
Figure 4-4
capacitors, and test points to configure the output voltage, precision enable, and switching frequency.
The 8-pin SO PowerPAD integrated circuit package offers an exposed thermal pad, which must be soldered to
the copper landing on the PCB for optimal thermal performance. The PCB consists of a 4-layer design. There
are 2-oz copper planes on the top and bottom and 1-oz copper mid-layer planes to dissipate heat with an array
of thermal vias under the thermal pad to connect to all four layers.
Test points have been provided for ease of use to connect the power supply, required load, and to monitor critical
signals.
8
LMR38020EVM User Guide
show the board layout for the LMR38020EVM. The EVM offers resistors,
Figure 4-1. Top Layer and Silkscreen Layer
Copyright © 2022 Texas Instruments Incorporated
SNVU787A – JULY 2021 – REVISED SEPTEMBER 2022
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