Error Control Ii And Error Control Ii Jumper Circuit Packs; General Description; Error Control Ii Circuit Pack Led - Northern Telecom BCS35 Replacement Manual

Error Control II and Error Control II
Jumper circuit packs

General description

The Error Control II circuit pack is located in slot 5 of the A chassis, and the
Error Control II Jumper circuit pack is in slot 5 of the B chassis.
The Error Control II circuit pack constantly checks the system to verify
satisfactory operation and to immediately sense and react to a fault. The
Error Control II Jumper circuit pack contains a loop to feed data from the B
processor bus to the Error Control II circuit pack in the A chassis. This
jumper also has a switch to bypass the Error Control II circuit pack if it
needs replacing.
On the system level, the Error Control II circuit pack regulates the status
lamps, alarms, and the Processor A Select (ASEL) line directing which
processor (A or B) currently controls the DPP.
This circuit pack contains no customer–selectable option settings. See
Table 5–1 and Figure 5–1 for the circuit pack layout.

Error control II circuit pack LED

This LED on the front edge of the circuit pack indicates that the self–tests
performed by the Error Control II circuits have failed. If this occurs,
processor (A and B) status is "frozen." This requires immediate attention to
prevent possible data loss if the PRIME status processor develops a fault.
Without the Error Control II circuit pack circuits fully operational, the
processors probably cannot "switch" if a malfunction occurs.
If there is a minor problem during the test, the LED lights and immediately
dims. However, if the LED stays lit, check the MAP output for failure
indications. See DPP Alarm Clearing and Performance Monitoring
Procedures (297–1001–543) for repair procedures.
DPP Card Replacement Guide BCS35 and up
35