Central Processor Unit (Cpu); General Description - Northern Telecom BCS35 Replacement Manual

Central Processor Unit (CPU)

General description

The CPU circuit pack is located in slot 1 of the A and B chassis. The CPU,
which has direct memory access, organizes data flow throughout the DPP.
Its operations can be classified according to the functions of its four major
Integrated Circuits (ICs):
•
•
•
•
The 8–bit microprocessor Z80 IC is responsible for operational, statistical,
and maintenance functions. Some of its activities include communication,
statistics, and log messages. The Z80 microprocessor is driven by the
crystal clock (on the same circuit pack) through the various program steps.
The Direct Memory Access (DMA) IC is a Z80–compatible device,
responsible for data transfer to and from Random Access Memory (RAM)
and the DSI circuit packs.
The Counter Timer Circuit (CTC) IC handles interrupts from various
devices within the DPP that request access to the bus for data transfer. AC
power (the 60 Hz signal supplied from the external ac transformer, if
equipped) is supplied to the P/A Comm circuit pack. Here it is converted to
60 Hz pulses and supplied to the CTC so it can generate the interrupt. The
CTC recognizes the priority of the devices interrupting the normal idle state
of the Z80 microprocessor and directs the Z80 to grant access to the bus
according to the importance of the device making the request.
The Parallel Input/Output (PIO) Circuit IC is used for all interprocessor
communications.
The clock signal used to drive the Z80 microprocessor originates from a
crystal on the CPU circuit pack.
Z80 IC
DMA IC
CTC IC
PIO IC
DPP Card Replacement Guide BCS35 and up
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