Analog Timer Block Diagram - Panasonic DMR-BWT955GL Service Manual

11.3. Analog Timer Block Diagram

DIGITAL P.C.B.
FRONT P.C.B.
S7201
POWER
IR7201
S7202
REMOTE CONTROL
OPEN/
RECEIVER
CLOSE
VDD GND IR
2 3 1
JK55001-13PIN
Q59503
SWITCHING
IC59505
(RESET)
OUT
1
IC59502
(RESET)
OUT 4
IC58401
(RESET)
HDD_PFAIL_L
OUT
1
MAIN P.C.B.
P7201 P7407 P7406 P58813
6 8
P7201 P7407 P7406 P58813
7 9
P7201 P7407 P7406 P58813
8 12
P7201 P7407 P7406 P58813
PW_XN_3.3V PW_XN_3.3V
10 14
X59501
10MHz
X59502
32.768KHz
Q59506,
Q59507 Q59508
BUFFER
IC59501
(TIMER)
LCD_TXD
18
LCD_CLK 20
LCD_CS 32
PFAIL[L]
31
14 RESET
59 HDD_PFAIL[L]
3 KEYIN3
DR_P_ON_H
DR_P_ON[H] 43
1 KEYIN1
P_STANDBY_H 42
QR59506
JC_P_ON_H
JC_P_ON[H] 49
27 REMOCON
HDMI_P_ON_H
HDMI_P_ON[H]
55
JC_P_ON_DL_H
JC_P_ON_DL_H 56
G_XINTM_A
XINTM_OUT 22
XINTM[TBUS] 29
10MHz_IN
9
G_XINTP_A
23
XINTP_OUT
G_SCLK_A
TBUS_CLK
17
XMPREQ
8 10MHz_OUT XMPREQ[TBUS] 30
G_SBPTM_A
UARTP2M/TBUS_TXD
15
G_SBMTP_A
UARTM2P/TBUS_RXD 16
32.768KHz_OUT
12
XRES_PKS 51
PEAKS_STATE 57
11 32.768KHz_IN
SD_BOOT 63
FAN_DA 62
28 HDMI_MONI(CEC_IN)
26 HDMI_CEC_OUT
FANLOCK
47
82
MAIN P.C.B. FRONT P.C.B.
IC7201
(DISPLAY DRIVE)
P58813 P7406 P7407 P7201
3 DIO
1 1
P58813 P7406 P7407 P7201
2 CLK
2 2
P58813 P7406
P7407 P7201
1 CSB
3 3
SEG25 36
VDD
XN3.3V 5
6 VLCD
39
LED3
41 LED1
42 LED0
QR59505
PW_X_SW3.3V
IC51001
(HD DEC/ENC/CPU/GFX Process/
DDR3-IF/RTSC/AV Core/Graphics)
AK4
AL3
AP2
AJ4 XMPREQ
AP3
AN4
AP4 XRST
AP4 XSRST
AL4 SDBOOT
PW_X_SW12.0V
Q59501,Q59502
DP7201
SEG0 11
5 SEG25
SEG4 15
SEG5 16
30 SEG0
COM0 7 1 COM3
COM3 10 4 COM0
D7201
REC1
D7202
REC2
LCD_5V
D7203
REC3
DR_P_ON_H
P_STANDBY_H
TO DIGITAL P.C.B.
REGULATOR BLOCK
JC_P_ON_H DIAGRAM
HDMI_P_ON_H
JC_P_ON_DL_H
XINTM
TXCLK
SCLKM
SBPTM
SBMTP
FAN MOTOR
P58810
M
1
P58810
3
DMR-BWT955GL
Timer Block Diagram