Nvidia Jetson AGX Xavier Series Design Manual page 94

Module Pin
Pin # SoC Signal
Name
D46 CSI5_D1_P CSI_F_D1_P
J45 CSI6_CLK_N CSI_G_CLK_N
J44 CSI6_CLK_P CSI_G_CLK_P
K43 CSI6_D0_N CSI_G_D0_N
K44 CSI6_D0_P CSI_G_D0_P
H45 CSI6_D1_N CSI_G_D1_N
H46 CSI6_D1_P CSI_G_D1_P
B46 CSI7_CLK_N CSI_H_CLK_N
B45 CSI7_CLK_P CSI_H_CLK_P
A45 CSI7_D0_N CSI_H_D0_N
A44 CSI7_D0_P CSI_H_D0_P
C48 CSI7_D1_N CSI_H_D1_N
C47 CSI7_D1_P CSI_H_D1_P
Notes:
1. The C-PHY pin mappings are programmable. See the Jetson
(GMSL Interposer section) for details.
2. In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.
Jetson AGX Xavier Series Product
Usage/Description
Camera, CSI 5: DPHY Data 1+. CPHY
51:A
Camera, CSI 6: DPHY Clock–, CPHY
61:C
Camera, CSI 6: DPHY Clock+. CPHY
60:C
Camera, CSI 6: DPHY Data 0–. CPHY
60:B
Camera, CSI 6: DPHY Data 0+. CPHY
60:A
Camera, CSI 6: DPHY Data 1–. CPHY
61:B
Camera, CSI 6: DPHY Data 1+. CPHY
61:A
Camera, CSI 7: DPHY Clock–, CPHY
71:C
Camera, CSI 7: DPHY Clock+. CPHY
70:C
Camera, CSI 7: DPHY Data 0–. CPHY
70:B
Camera, CSI 7: DPHY Data 0+. CPHY
70:A
Camera, CSI 7: DPHY Data 1–. CPHY
71:B
Camera, CSI 7: DPHY Data 1+. CPHY
71:A
AGX Xavier Series Camera Module Hardware Design Guide
Usage on NVIDIA
Direction
Carrier Board
DG-09840-001_v2.5 | 79
Video Input
Pin Type