Sharp HT-DV40H Service Manual page 88

HT-DV40H
IC1 VHiSP8281AWU5 : DVD DECODER (SP8281) (3/3)
PIN DESCRIPTION
Symbol Pin #
VSS_O0/VSS_K0 53
VSS_O1/VSS_K1 70
VSS_O2/VSS_K2 119
VSS_O2/VSS_K3 134
VSS_O2/VSS_K4 148
VSS_O2/VSS_K5 170
VSS_O2/VSS_K6 202
VSS_O2/VSS_K7 224
VDD_K0 66
VDD_K1 90
VDD_K2 125
VDD_K3 141
VDD_K4 163
VDD_K5 182
NC 45
VDD_O1 74
VDD_O2 96
VDD_O3 112
VDD_O4 132
VDD_O5 156
VDD_O6 177
VDD_O7 197
VDD_O8 234
USB_GND 99
USB_VDD 100
VSS_PLLA 103
VDD_PLLA 104
VSS_PLLV 105
VDD_PLLV 106
VDD_TVA0 212
VDD_TVA1 216
VDD_TVA2 220
VSS_TVA0 213
VSS_TVA1 217
VSS_TVA2 222
R_D7 46
R_D6 47
R_D5 48
R_D4 49
R_D3 50
R_D2 51
R_D1 52
R_D0 54
R_WE_B 55
R_OE_B 56
SPDC_OUT/ n/a
GPIO
Input/Output
S Chip kernel logic and output shared ground pin #0
S (#1)
S (#2)
S (#3)
S (#4)
S (#5)
S (#6)
S (#7)
S Kernel logic power supply pins for chip kernel logic and input pre-driver #0
S (#1)
S (#2)
S (#3)
S (#4)
S (#5)
S NC
S Input/Output power supply pins #1
S (#2)
S (#3)
S (#4)
S (#5)
S (#6)
S (#7)
S (#8)
S Ground pin for USB PLL
S 3.3V power for USB PLL and USB transceiver
S Ground pin for USB transceiver and audio PLL
S 3.3V power supply pin for audio PLL
S Ground pin for system PLL and audio PLL
S 1.8V power supply pin for system PLL
S 3.3V power supply pin for TV DAC
S (#1)
S (#2)
S Ground pin for TV DAC
S (#1)
S (#2)
Input/Output ROM / SRAM / flash data bus bit [7]
Input/Output ROM / SRAM / flash data bus bit [6]
Input/Output ROM / SRAM / flash data bus bit [5]
Input/Output ROM / SRAM / flash data bus bit [4]
Input/Output ROM / SRAM / flash data bus bit [3]
Input/Output ROM / SRAM / flash data bus bit [2]
Input/Output ROM / SRAM / flash data bus bit [1]
Input/Output ROM / SRAM / flash data bus bit [0]
Input/Output ROM / SRAM / flash write strobe
Input/Output ROM / SRAM / flash output enable
Input/Output
Servo SPDC_OUT
Priority selection
gpio_first[0][0] = 1
sft_cfg13[11:9] = 3'b010
sft_cfg13[11:9] = 3'b011
sft_cfg13[11:9] = 3'b101
sft_cfg13[11:9] = 3'b110
sft_cfg13[11:9] = 3'b111
sft_cfg4[0] = 1
sft_cfg11[5:3] = 3'b001
sfg_cfg15[2:0] = 3'b010
sfg_cfg16[15:12] = 4'b0011
sfg_cfg18[3:0] = 4'b0101
sfg_cfg18[3:0] = 4'b0110
(other)
Description
Function
GPIO[0]
AT_IORDY_B
AT_ADR[0]
AT_ADR[0]
AT_ADR[0]
AT_DIOW_B
SPDC_OUT (default)
EXT_TS_CLK
FM_GPIOB[2]
FM_GPIOB[16]
FM_GPIOB[36]
FM_GPIOB[36]
GPIO[0]
8 – 3
Dir
Input/Output
Input
Output
Output
Output
Output
Input/Output
Input
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output