4.8
TG/CDS SCHEMATIC DIAGRAM
TO CCD
CN5301
0 1 MAIN (TG/CDS)
CN22
5
H1
H2
V4
V3
V2
V1
GND
GND
GND
CCD
CCD_OUT
CCD_HV
C5231
SUB
∗
4
C5218
CCD_LV
RG
C5230
3
0.1
100k
R5217
TO REG
L5201
REG_3.2V
47µ
L5203
22µ
REG_15V
2
REG-8-5V
L5202
22µ
TO REG
C5219
C5201
6.8
GND
CDS_CS
SCK3
TO CPU
SO3
CCD_SCS
DSGAT
1
NOTES : 1. The parts with marked ( ) is not used.
2. For TG/CDS waveforms, please refer to page 4-45.
A
B
CCD
NC
NC
NC
CCDCKH
VM
CLDCLK
V2
IC5202
V4
V1
JCY0098
VH
C5229
V3
CLPDM
1µ
/25
TG+V_DRIVER
SUB
OBCLP
VL
TESTEN
NC
NC
CKINH
NC
NC NC
T
C5221
/16
1
/16
∗
C
D
NOTES :
For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
VICK
NC
C5211
∗
R5211
NC
C5237
10p
R5202
22
C5214
VDD1
C5225
0.1
C5213
3300p
CK
C5212
VSS1
C5210
0.1
PBLK
C5209
0.01
NC
C5208
0.01
C5207
0.01
ID
R5201
24k
WEN
NC
4-17
4-18
E
NC
WF1
WF2
1
NC
CDSIN
0.01
ADCIN
BLKSH
IC5201
BLKFB
1
AVSS
HD49326BF
AVDD
VRT
CDS+AGC+A/D
VRB
VRM
BIAS
NC
F
TO VTR ASP
C
V_PB_C
TO DSP
NC
D9
AD_9
D8
AD_8
D7
AD_7
D6
AD_6
D5
AD_5
D4
AD_4
D3
AD_3
D2
AD_2
D1
AD_1
D0
AD_0
NC
TO DSP
PBLK
LHFO
VDTG
HDTG
ID
CDS_CLK
CAM_ADCK
TG_CLK
y30152001a_rev0
G
H