Block Diagram - Md Board - Sony HCD-M10 Service Manual

Micro hi-fi component system
Table of Contents

Advertisement

BLOCK DIAGRAM – MD SECTION –
HR901
OVER WRITE HEAD
48
OPTICAL PICK-UP
(KMS-260B)
I
I
1
RF AMP
J
J
2
VC
3
VC
D101
TEMP
F
SENSOR
B
15
TEMPR
C
B
14 TEMPI
I
J
D
A
A
A
4
B
5
I-V
C
E
AMP
6
D
DETECTOR
7
C
D
E
E
8
I-V
F
F
AMP
9
LD+3V
Q121, 122
ILCC
APC
LD/PD
AUTOMATIC
11
AMP
POWER CONTROL
PD
LD
LASER DIODE
Q101
PD
PD
LASER ON
10
SWITCH
IC141
FOCUS/TRACKING COIL DRIVER,
SPINDLE/SLED MOTOR DRIVER
16
PSB
SPFD
6
OUT4F
IN4R
3
M101
M M
SPRD
(SPINDLE)
OUT4R
IN4F
8
4
27
OUT2F
IN2F
29
M102
M
(SLED)
25
OUT2R
IN2R
30
2-AXIS
DEVICE
FCS+
21
OUT1F
IN1F
19
23
OUT1R
IN1R
18
FCS–
TRK+
12
OUT3F
IN3F
14
TRK–
10
OUT3R
IN3R
15
MOD
HF MODULE
IC181, Q181 182
OVER WRITE
HEAD DRIVE
SCTX
IC151 (1/2)
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC101
47
RF AMP,
FOCUS/TRACKING ERROR AMP
RFO
AGCI
RF AGC
RF
46
40
38
& EQ
EQ
WBL
B.P.F.
AUX
33
3T
PEAK
37
TEMP
PEAK &
BOTM
BOTTOM
36
WBL
ADFM
ADIN
AT
ADFG
B.P.F.
29
30
32
AMP
ABCD
ABCD
35
AMP
FE
FOCUS
34
ERROR AMP
TE
26
TRACKING
SE
ERROR AMP
28
COMMAND
SERIAL/PARALLEL
V-I
F0CNT
20
CONVERTER,
CONVERTER
DECODER
BUP+3.3V
12
16
17
18
83
10
13
67 65 66 75 74 63 64
RECP
XRST
AUTOMATIC
POWER
CONTROL
SFDR
92
ANALOG MUX
SRDR
91
A/D CONVERTER
DIGITAL SERVO
SIGNAL
FROM CPU
FFDR
PROCESS
88
INTERFACE
FRDR
89
XLRF
XLAT
80
AUTO
CKRF
SCLK
81
SEQUENCER
DTRF
SWDT
82
TFDR
86
IC151 (2/2)
TRDR
85
DIGITAL SERVO
SIGNAL PROCESSOR
15
68
VC
TX
EFMO
100
FILI
60
PCO
CONVERTER
59
PLL
CLTV
62
FILO
61
ASYO
53
INTERFACE
ASYI
54
COMPA-
RFI
RATOR
57
SUBCODE
ADIP
PROCESSOR
78
DEMODULATOR/
DECODER
CPU
INTERFACE
F0CNT
SPINDLE
79
SERVO
94 93
12 11
14
9
8
5 6 7
IC861
5
RESET
3
18
20
25
58 32
31
33 50
Q861
SWITCH
12
S-RST
57
LDON
52
DIG-RST
54
WRPWR
56
MOD
67 66
9
7
VCC 6
IC871
LOADING
MOTOR DRIVER
VREF
1
VOLTAGE SWITCH
4
2
M
M103
(LOADING)
(REFLECT
→ PROTECT)
3
4
-A
IC102
WAVEFORM
Q131 - 134
SHAPER
HF MODULE
LD+3.3V
SWITCH
43
43
IC151 (1/2)
ADDT
25
DADTI
SAMPLING
DADTI
22
RATE
XBCKI
XBCKI
24
LRCKI
LRCKI
23
DIN
DIN0
19
DIGITAL
DIN1
AUDIO
20
DOUT
DOUT
21
DADT
26
XBCK
28
LRCK
27
FS256
29
X171
90MHz
OSCI
16
CLOCK
IC153
OSCO
GENERATOR
17
D-RAM
INTERNAL BUS
MONITOR
CONTROL
XOE
1 2 3 4
43
22
OE
XWE
47
3
WE
XRAS
46
4
RAS
XCAS
44
23
CAS
PDOWN
59 48
19
XIN
15
X720
10MHz
13
XOUT
OPTO
81
OPTSEL
IC701
82
ADPDWN
IC195
MASTER CONTROLLER
EEPROM
47
7
WP
EEP-WP
M+7V
45
6
SCL
EEP-CLK
SDA
EEP-DATA
60
5
Q871, 872
REFERENCE
65
LOAD-LO
S101
55
LIMIT-IN
(LIMIT IN)
Q211
S103
(OUT)
49
12
OUT-SW
MUTE
76
SWITCH
S104
(PLAY)
51
PLAY-SW
79
13
SLICER-SEL
S105
78
1
(REC)
DA-RESET
53
REC-SW
80
21
SPDIF-LOCK
S102
61
REFLECT
I2C-BUSY
23
I2C-BUSY
44
PROTECT
I2C-CLK
29
IOP
I2C-CLK
89
IOP
I2C-DATA
I2C-DAT 30
SPDIF-CUT
72
IC190
+3.3V
LD+3.3 V
+5V
3
1
REG
HCD-M10
• R-CH is omitted due to same as L-CH
• Signal Path
: PB (MD)
: REC (MD)
: CD (DIGITAL)
: CD (ANALOG)
DIN , OPTO
A
CD
SECTION
PDOWN , MUTE
B
IC201
MAIN
A/D
SECTION
CONVERTER
13
11
12
1
VINL
REC-L
VINR
3
R-CH
PWON
7
8
C
MAIN
SECTION
15
16
33
37
29
MUTE
18
MD-L
VOUTL
SLICER-SEL
IC211
VOUTR
22
R-CH
RESET
D/A
CONVERTER
LOCK
VDDA (DAC) 32
I2C-DATA,I2C-CLK,
I2C-BUSY
D
Q201,202
MAIN
+B
+3.3V
SECTION
SWITCH

Advertisement

Table of Contents
loading

Table of Contents