Epson S1C17624 Technical Manual page 209

Cmos 16-bit single chip microcontroller
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2
20 i
C MaSTeR (i2CM)
note: The pins go to high impedance status when the port function is switched.
The SCL0 and SDA0 pins do not output a high level, so these lines should be pulled up to V
with an external pull-up resistor. Be sure to avoid pulling these pins up to a voltage that exceeds
the V
level.
DD
20.3
Synchronization Clock
The I2CM module uses the internal clock (I2CM clock) output by the 16-bit timer (T16) Ch.2 as the synchroniza-
tion clock. This clock is output from the SCL0 pin to the slave device while also driving the shift register. The clock
should be programmed to output a signal matching the transfer rate from T16 Ch.2. For more information on T16
control, see the "16-bit Timers (T16)" chapter.
When the I2CM module is used to communicate with a slave device that performs clock stretching, the maximum
transfer rate is limited to 50 kbps in standard mode or 200 kbps in fast mode.
The I2CM module does not function as a slave device. The SCL0 input pin is used to check the I
status. It is not used for synchronization clock input.
20.4
Settings Before Data Transfer
The I2CM module includes an optional noise filter function that can be selected via the application program.
noise filter function
The I2CM module includes a function for filtering noise from the SDA0 and SCL0 pin input signals. This
function is enabled by setting NSERM/I2CM_CTL register to 1. Note that using this function requires setting
the I2CM clock (T16 Ch.2 output clock) frequency to 1/6 or less of PCLK.
20.5
Data Transfer Control
Make the following settings before starting data transfers.
(1) Configure T16 Ch.2 to output the I2CM clock. (See the T16 module chapter.)
(2) Select the option function. (See Section 20.4.)
(3) Set the interrupt conditions to use I2CM interrupts. (See Section 20.6.)
note: Make sure the I2CM module is halted (I2CMEN/I2CM_EN register = 0) before changing the above
settings.
enabling data transfers
Set I2CMEN/I2CM_EN register to 1 to enable I2CM operations. This enables I2CM transfers and clock input/
output.
note: Do not set I2CMEN to 0 when the I2CM module is transferring data.
Starting Data transfer
To start data transfers, the I
sent to establish communications.
(1) Generating start condition
The start condition applies when the SCL line is maintained at High and the SDA line is pulled down to Low.
20-2
SCL0
I2CM
SDA0
I
2
2
Figure 20.
2.1 I
C Connection Example
C master (this module) must generate a start condition. The slave address is then
2
Seiko epson Corporation
V
DD
C slave
I
2
C slave
S1C17624/604/622/602/621 TeChniCal Manual
DD
C bus SCL signal
2

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