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VRFCORE
IO_VDD
AGND
AGND
VRFCOREPLL
VRF25PLL
AGND
VRF33
IC604
8
VCC
7
OUT1
IN1
1
ANTA
5
OUT2
IN2
3
ANTB
2
OUT3
IN3
6
TX2
GND
4
AGND
M1_RESET_L
RF_nRST
AGND
BL-C30 RF BOARD No.2 (1/2)
CORE_VDD
VRFCORE
WF1_RFDATAOUT3
WF1_RFSHIFT
WF1_RFLOAD
10K
R620
WF1_ADCP_Q
WF1_ADCN_I
WF1_DACP_Q
WF1_DACN_I
IO_VDD_A
IO_VDDA
RFDATAIN
ATTEN2
WF1_RFDATAOUT2
WF1_RFDATAOUT1
R621
10K
WF1_ADCN_Q
WF1_ADCP_I
WF1_DACN_Q
WF1_DACP_I
WF1_RFDATAOUT0
IO_VDD
R622
VRF25PLL
10K
VRFCOREPLL
R602
6.19K
C618
AGND
22p
M0_MDIO
M0_MDC
RF_LINK
R604
LED601
2
1
220
R623
AGND
10K
WF1_RFRESET_L
IO_VDD
M1_COL
CLK40
AGND
AGND
TXD[3]
M1_TXEN
VRF33
TXD[1]
TXD[2]
RXD[3]
M1_RXC
M1_TXC
TXD[0]
RXD[1]
TXD[0-3]
RXD[2]
FL_DATA[7]
M1_RXDV
RXD[0]
M1_RXERR
FL_DATA[4]
FL_DATA[5]
RXD[0-3]
FL_DATA[6]
IO_VDD
IC601
A1
SD_DATA_20
WF1_TX2
SD_DATA_19
A2
WF1_RF_DATAOUT_3
A3
WF1_RF_SHIFT
SD_DATA_17
A4
WF1_RF_LOAD
SD_DATA_24
SD_DATA_29
TDI
A5
TDI
SD_DATA_31
A6
AGND_A6
A7
ADC_QP
MEM_ADDR_4
A8
AGND_A8
MEM_ADDR_5
A9
ADC_IN
MEM_ADDR_6
A10
AGND_A10
MEM_ADDR_7
A11
DAC_QP
A12
AGND_A12
MEM_ADDR_9
A13
SD_CLK
DAC_IN
A14
AGND_A14
A15
NC_A15
SD_DLY_IN
A16
NC_A16
MEM_ADDR_16
A17
NC_A17
SD_DATA_7
B1
SD_DATA_6
WF1_RF_DATAIN5
B2
WF1_ANTC
SD_DATA_9
B3
WF1_RF_DATAOUT_2
B4
WF1_RF_DATAOUT_1
SD_DATA_22
TCK
B5
SD_DATA_21
TCLK
B6
AGND_B6
SD_DATA_18
B7
ADC_QN
SD_DATA_16
B8
SD_DATA_28
AVDD33_B8
B9
ADC_IP
SD_DATA_30
B10
AVDD33_B10
MEM_ADDR_3
B11
DAC_QN
MEM_ADDR_1
B12
AVDD33_B12
B13
DAC_IP
MEM_ADDR_10
B14
AGND_B14
MEM_ADDR_8
B15
NC_B15
B16
NC_B16
MEM_ADDR_11
B17
NC_B17
MEM_ADDR_19
C1
WF1_TX5
SD_DLY_OUT
C2
WF1_RF_DATAOUT_0
MEM_ADDR_15
SD_DATA_8
C3
GND_C3
C4
VDD33_C4
SD_DATA_5
TDO
C5
TDO
SD_DATA_4
nTRST
C6
TRST_L
SD_DATA_23
C7
AVDD33_C7
GND_R15
C8
AVDD18_C8
VDD33_R14
C9
ADCISEL
SD_DATA_26
C10
ADCRES
SD_DATA_27
C11
AVDD18_C11
MEM_ADDR_17
C12
ADD18_C12
MEM_ADDR_2
C13
AVDD33_C13
MEM_ADDR_0
C14
VDD33_C14
C15
GND_C15
VDD18_R8
C16
MEM_ADDR_13
M0_MDIO
C17
M0_MDC
D1
WF1_ANTA
SD_CS_L
D2
WF1_ANTB
MEM_WE_L
VDD33_R4
GND_R3
D3
VDD33_D3
SD_DATA_10
D4
GND_D4
SD_DATA_3
D5
WF1_LED
TMS
D6
TMS
U0_SOUT
D7
WF1_RF_RESET_L
VDD33_P15
D8
GND_P14
EJTAG_SEL
D9
VDD18_D9
SD_DATA_25
D10
VDD18_D10
D11
AVDD18_D11
D12
AVDD18_D12
D13
VDD33_D13
NC_P12
D14
GND_D14
MEM_ADDR_18
D15
VDD33_D15
GND_P10
D16
M1_COL
VDD18_P9
D17
REF_CLK
VDD18_P8
MEM_ADDR_14
E1
SYS_RESET_L
MEM_ADDR_20
E2
WF1_ANTD
VDD33_P5
TP11
E3
RX_CLEAR
GND_P4
E4
VDD33_E4
VDD33_P3
E14
NC_E14
SD_DATA_2
E15
M1_RESET_L
SD_DATA_11
E16
M1_TXD_3
USB1_DMINUS
E17
M1_TXEN
USB1_DPLUS
F1
LPR_0
USB_CLK
F2
LPR_1
VDD33_N14
SD_DATA_1
SD_DATA_0
F3
LPR_2
SD_DATA_12
F4
COLD_RESET_L
SD_DATA_13
F14
M1_TXD_1
F15
M1_TXD_2
F16
M1_RXD_3
F17
M1_RXC
PROC_REF_CLK
G1
LPR_3
MEM_ADDR_22
MEM_ADDR_21
SD_DATA_14
G2
LPR_4
SD_DATA_15
G3
LPR_5
G4
LPR_6
G7
GND_G7
G8
GND_G8
G9
GND_G9
GND_L11
G10
GND_L10
GND_G10
G11
GND_G11
GND_L9
G14
GND_L8
M1_TXC
G15
M1_TXD_0
GND_L7
G16
M1_RXD_1
MEM_ADDR_12
G17
M1_RXD_2
FL_CS_L
H1
FL_DATA_7
FL_OE_L
H2
LPR_7
FL_DATA_0
H3
VDD18_H3
GPIO_0
H4
VDD18_H4
GPIO_1
H7
GND_H7
VDD18_K15
H8
GND_H8
VDD18_K14
H9
GND_H9
GND_K11
H10
GND_H10
GND_K10
H11
GND_H11
GND_K9
H14
GND_H14
GND_K8
H15
GND_K7
M1_RXDV
H16
M1_RXD_0
GND_K4
H17
M1_RXERR
FL_DATA_1
J1
FL_DATA_4
FL_DATA_2
J2
FL_DATA_5
FL_DATA_3
J3
FL_DATA_6
GPIO_3
J4
VDD18_J4
M1_CRS
J7
GPIO_2
GND_J7
J8
GND_J8
VDD18_J14
J9
GND_J9
GND_J11
GND_J10
AGND
IO_VDD
VRFCORE
U17
U16
U15
U14
U13
U12
U11
MEM_ADR[4]
U10
MEM_ADR[5]
U9
MEM_ADR[6]
U8
MEM_ADR[7]
U7
MEM_ADR[9]
U6
R609
U5
U4
MEM_ADR[16]
U3
SD_DATA[7]
U2
SD_DATA[6]
U1
SD_DATA[9]
T17
T16
T15
T14
T13
T12
T11
MEM_ADR[3]
T10
MEM_ADR[1]
T9
MEM_ADR[10]
T8
MEM_ADR[8]
T7
MEM_ADR[11]
T6
MEM_ADR[19]
T5
T4
MEM_ADR[15]
T3
SD_DATA[8]
T2
SD_DATA[5]
T1
SD_DATA[4]
AGND
R17
LCL_4
R16
R15
R14
R13
R12
R11
MEM_ADR[17]
R10
MEM_ADR[2]
R9
MEM_ADR[0]
R8
R7
MEM_ADR[13]
R6
nSD_CS
R5
nMEM_WE
R4
R3
R2
SD_DATA[10]
R1
SD_DATA[3]
P17
P16
LCL_5
P15
P14
P13
P12
P11
MEM_ADR[18]
P10
P9
P8
P7
MEM_ADR[14]
P6
MEM_ADR[20]
P5
P4
P3
P2
SD_DATA[2]
P1
SD_DATA[11]
N17
N16
N15
N14
N4
SD_DATA[1]
N3
SD_DATA[0]
N2
SD_DATA[12]
N1
SD_DATA[13]
M17
LCL_6
M16
U0_SIN
M15
LCL_7
M14
M4
MEM_ADR[22]
M3
MEM_ADR[21]
M2
SD_DATA[14]
M1
SD_DATA[15]
L17
LCL_0
L16
LCL_1
L15
LCL_2
L14
LCL_3
L11
L10
L9
L8
L7
L4
MEM_ADR[12]
L3
nFL_CS
L2
nFL_OE
L1
FL_DATA[0]
K17
K16
K15
K14
K11
K10
K9
K8
K7
K4
K3
FL_DATA[1]
K2
FL_DATA[2]
K1
FL_DATA[3]
J17
J16
J15
J14
J11
J10
AGND
AGND
(1)
(2)
L601
SD_CLK
NC
35mm
L602
(3)
S_TX
VRF33
VRF33
S_RX
W_LINK
AGND
VRF33
M1_CRS
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