ViewSonic N2652w-1M Service Manual page 73

8.16. MT5351 DDR Memory
RWE_1 RP45 22x4 MEM_WE_1
7 8
RCAS_1 MEM_CAS_1
5 6
RCS_1 3 4 MEM_CS_1
RBA0 MEM_BA0
1 2
RA10 RP49 22x4 MEM_ADDR10
7 8
RA0 5 6 MEM_ADDR0
RA2 MEM_ADDR2
3 4
RA3 MEM_ADDR3
1 2
RA5 RP53 22x4 MEM_ADDR5
7 8
RA6 MEM_ADDR6
5 6
RA8 3 4 MEM_ADDR8
RA9 MEM_ADDR9
1 2
RA12 R266 22 MEM_ADDR12
RA13 R268 22 MEM_ADDR13
RP61 22x4 MEM_RAS_1
RRAS_1 1 2
RBA1 MEM_BA1
3 4
RA1 5 6 MEM_ADDR1
RA4 MEM_ADDR4
7 8
RA7 R270 22 MEM_ADDR7
RA11 R274 22 MEM_ADDR11
RCKE R280 22 MEM_CLKEN
CLOSED TO MT5351
RCLK0 R284
47
R0603
RCLK0_1 R286
47
R0603
RCLK1 R287
47
R0603
RCLK1_1 R290
47
R0603
CLOSED TO MT5351
+1V25_DDR
C504 C505 C506
0.1U 0.1U 0.1U
C0603 C0603 C0603
+1V25_DDR
C525 C526 C527
0.1U 0.1U 0.1U
C0603 C0603 C0603
+1V25_DDR
BYPASS CAP. FOR TERMINATOR
C546 C547
0.1U 0.1U
(EVERY 2 RESISTOR PUT 1
C0603 C0603
BYPASS CAP.)
ViewSonic Corporation
+1V25_DDR
MEM_ADDR5 RP46 75x4 RDQ0 RP47
7 8 7
MEM_ADDR4 RDQ1
5 6 5
MEM_ADDR13 3 4 RDQ2 3
MEM_WE_1 RDQ3
1 2 1
MEM_ADDR10 RP50 75x4 RDQ4 RP51
7 8 7
MEM_ADDR0 5 6 RDQ5 5
MEM_ADDR1 RDQ6
3 4 3
MEM_ADDR2 RDQ7
1 2 1
MEM_ADDR9 RP54 75x4 RDQS0 R258
7 8
MEM_ADDR8 RDQM0 R260
5 6
MEM_ADDR7 3 4 RDQM1 R262
MEM_ADDR6 RDQS1 R264
1 2
RDQ8 RP55
7
MEM_ADDR12 R267 75 RDQ9
5
RDQ10
3
MEM_CAS_1 R269 75 RDQ11 1
RDQ12 RP57
7
RDQ13
5
RDQ14
3
RDQ15
1
RDQ16 RP59
7
RDQ17
5
RP62 75x4 RDQ18
MEM_BA1 1 2 3
MEM_BA0 RDQ19
3 4 1
MEM_CS_1 5 6 RDQ20 7 RP63
MEM_RAS_1 RDQ21
7 8 5
RDQ22
3
MEM_ADDR3 R271 75 RDQ23 1
RDQS2 R272
MEM_ADDR11 R275 75 RDQM2 R276
RDQM3 R278
MEM_CLKEN R281 (NC)75 RDQS3 R282
RDQ24 7 RP65
RDQ25
5
RDQ26
3
RDQ27
CLOSED TO DDR 1
RDQ28 RP67
7
RDQ29 5
RDQ30
3
RDQ31
1
MEM_CLKA
CLOSED TO MT5351
R285
100
R0603
MEM_CLKA_1
MEM_CLKB
R288
100 MEM_VREF
R0603
MEM_CLKB_1
C493 C491
0.1U 0.1U
C0603 C0603
CLOSED TO DDR
C507 C508 C509 C510 C511 C512
C513
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
C0603 C0603 C0603 C0603 C0603 C0603
C0603
C531 C532 C533 C534
C528 C529 C530
0.1U 0.1U 0.1U 0.1U
0.1U 0.1U 0.1U
C0603 C0603 C0603 C0603
C0603 C0603 C0603
70
N2652w-1M
Confidential - Do Not Copy
+1V25_DDR
DV25
47x4 MEM_DQ0 RP48 75x4
8 7 8
MEM_DQ1
6 5 6
4 MEM_DQ2 3 4
MEM_DQ3
2 1 2
47x4 MEM_DQ4 RP52 75x4 MEM_DQ0
8 7 8
6 MEM_DQ5 5 6
MEM_DQ6 MEM_DQ1
4 3 4
MEM_DQ7 MEM_DQ2
2 1 2
47 MEM_DQS0 R259 75
47 MEM_DQM0 R261 75 MEM_DQ3
47 MEM_DQM1 R263 75 MEM_DQ4
47 MEM_DQS1 R265 75
47x4 MEM_DQ8 RP56 75x4 MEM_DQ5
8 7 8
MEM_DQ9 MEM_DQ6
6 5 6
MEM_DQ10
4 3 4
2 MEM_DQ11 1 2 MEM_DQ7
47x4 MEM_DQ12 RP58 75x4
8 7 8
MEM_DQ13
6 5 6
MEM_DQ14 MEM_DQS0
4 3 4
MEM_DQ15 MEM_ADDR13
2 1 2
47x4 MEM_DQ16 RP60 75x4
8 7 8
MEM_DQ17 MEM_DQM0
6 5 6
MEM_WE_1
4 MEM_DQ18 3 4
MEM_DQ19 MEM_CAS_1
2 1 2
8 47x4 MEM_DQ20 7 RP64 8 75x4 MEM_RAS_1
MEM_DQ21 MEM_CS_1
6 5 6
MEM_DQ22
4 3 4
2 MEM_DQ23 1 2 MEM_BA0
47 MEM_DQS2 R273 75 MEM_BA1
47 MEM_DQM2 R277 75 MEM_ADDR10
47 MEM_DQM3 R279 75 MEM_ADDR0
47 MEM_DQS3 R283 75 MEM_ADDR1
8 47x4 MEM_DQ24 7 RP66 8 75x4 MEM_ADDR2
MEM_DQ25 MEM_ADDR3
6 5 6
MEM_DQ26
4 3 4
MEM_DQ27
2 1 2
47x4 MEM_DQ28 RP68 75x4
8 7 8
6 MEM_DQ29 5 6
MEM_DQ30
4 3 4
MEM_DQ31
2 1 2
CLOSED TO DDR
B9105B_2V5
B9105B_3V3
I150
L228 SG20 R233
1 8
Vin VDDQ
1.21K1%
R0603
2 7
Vin VDDQ
+1V25_DDR
3 6
VTT ADJ
4 5
GND GND
+ C490 R234
100U/16V
AQ9105B 1.15K1%
CE025063 R0603
DV25
C515
C514
0.1U 0.1U
C0603
C0603 +
C535 C536 DV25
0.1U 0.1U
C0603 C0603
+
DV25
I128
1 66
VDD VSS
MEM_DQ15 MEM_DQ16
2 65
DQ0 DQ15
3 64
VDDQ VSSQ
MEM_DQ14 MEM_DQ17
4 63
DQ1 DQ14
MEM_DQ13 MEM_DQ18
5 62
DQ13
DQ2
6 61
VSSQ VDDQ
MEM_DQ12 MEM_DQ19
7 60
DQ3 DQ12
8 59 MEM_DQ11 MEM_DQ20
DQ4 DQ11
9 58
VDDQ VSSQ
MEM_DQ10 MEM_DQ21
10 57
DQ5 DQ10
MEM_DQ9 MEM_DQ22
11 56
DQ6 DQ9
12 55
VSSQ VDDQ
13 54 MEM_DQ8 MEM_DQ23
DQ7 DQ8
14 53
NC NC
15 52
VDDQ VSSQ
MEM_DQS1 MEM_DQS2
16 51
LDQS UDQS
MEM_ADDR13
17 50
NC NC
18 49 MEM_VREF
VDD VREF
19 48
NC VSS
MEM_DQM1 MEM_DQM2
20 47
LDM UDM
MEM_CLKA_1 MEM_WE_1
21 46
WE CLK
MEM_CLKA MEM_CAS_1
22 45
CAS CLK
23 44 MEM_CLKEN MEM_RAS_1
RAS CKE
MEM_CS_1
24 43
CS NC
MEM_ADDR12
25 42
NC A12
26 41 MEM_ADDR11 MEM_BA0
BS0 A11
MEM_ADDR9 MEM_BA1
27 40
BS1 A9
MEM_ADDR8 MEM_ADDR10
28 39
A10/AP A8
MEM_ADDR7 MEM_ADDR0
29 38
A0 A7
MEM_ADDR6 MEM_ADDR1
30 37
A1 A6
31 36 MEM_ADDR5 MEM_ADDR2
A2 A5
MEM_ADDR4 MEM_ADDR3
32 35
A3 A4
33 34
VDD VSS
16M x 16 DDR TSOP-66
TSOP66/SMD
DDR#1
B9105B_3V3
12,15,18 B9105B_3V3
GND
11,12,13,14,15,17,18 GND
GLOBAL SIGNAL
RDQ[0..31]
15 RDQ[0..31]
RDQS[0..3]
15 RDQS[0..3]
RDQM[0..3]
15 RDQM[0..3]
RA[0..13]
15 RA[0..13]
RBA[0..1]
15 RBA[0..1]
RCLK0
15 RCLK0
RCLK0_1
15 RCLK0_1
RCS_1
15 RCS_1
RRAS_1
15 RRAS_1
+ C492 RCAS_1
15 RCAS_1
47U/16V RWE_1
15 RWE_1
CE025050
RCKE
15 RCKE
RCLK1
15 RCLK1
RCLK1_1
15 RCLK1_1
MEM_VREF
18 MEM_VREF
DDR MEMORY
EQUAL LINE LENGTH
MEM_VREF
C496 C497 C498 C499
C494 C495
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
C0603 C0603 C0603 C0603
C0603 C0603
C516 C517 C518 C519 C520 C521
100U/16V 0.1U 0.1U 0.1U 0.1U 0.1U
C0603 C0603 C0603 C0603 C0603
CE025063
FOR DDR#1
C537 C538 C539 C540 C541 C542
100U/16V 0.1U 0.1U 0.1U 0.1U 0.1U
CE025063 C0603 C0603 C0603 C0603 C0603
FOR DDR#2
BYPASS CAP. FOR DDR
DV25 DV25
I129
1 66
VDD VSS
MEM_DQ31
2 65
DQ0 DQ15
3 64
VDDQ VSSQ
MEM_DQ30
4 63
DQ1 DQ14
MEM_DQ29
5 62
DQ13
DQ2
6 61
VSSQ VDDQ
MEM_DQ28
7 60
DQ3 DQ12
8 59 MEM_DQ27
DQ4 DQ11
9 58
VDDQ VSSQ
MEM_DQ26
10 57
DQ5 DQ10
MEM_DQ25
11 56
DQ6 DQ9
12 55
VSSQ VDDQ
13 54 MEM_DQ24
DQ7 DQ8
14 53
NC NC
15 52
VDDQ VSSQ
MEM_DQS3
16 51
LDQS UDQS
17 50
NC NC
18 49 MEM_VREF
VDD VREF
19 48
NC VSS
MEM_DQM3
20 47
LDM UDM
MEM_CLKB_1
21 46
WE CLK
MEM_CLKB
22 45
CAS CLK
23 44 MEM_CLKEN
RAS CKE
24 43
CS NC
MEM_ADDR12
25 42
NC A12
26 41 MEM_ADDR11
BS0 A11
MEM_ADDR9
27 40
BS1 A9
MEM_ADDR8
28 39
A10/AP A8
MEM_ADDR7
29 38
A0 A7
MEM_ADDR6
30 37
A1 A6
31 36 MEM_ADDR5
A2 A5
MEM_ADDR4
32 35
A3 A4
33 34
VDD VSS
16M x 16 DDR TSOP-66
TSOP66/SMD
DDR#2
B9105B_2V5 DV25
L152
R121/0603
L0603
+ C428 C430
100U/16V 0.1U
CE025063 C0603
C500 C501 C502 C503
0.1U 0.1U 0.1U 0.1U
C0603 C0603 C0603 C0603
C522 C523 C524
0.1U 0.1U 0.1U
C0603 C0603 C0603
C543 C544 C545
0.1U 0.1U 0.1U
C0603 C0603 C0603