Bose AV28 Manual page 20

5.0 Video Electronics
U1
Digital
CS98000
Video signals may be generated internally (by U1) or passed-through from a set of external
(VIDEO INPUT) connectors. Internally generated signals include DVD playback and On Screen
Display (OSD) signals. OSD menus are accessed by pressing the SETTINGS button on the RF
remote. When not playing back a DVD or generating an OSD, the media center defaults to passing-
through external video signals, much as a VCR does. The media center is capable of being con-
nected to either NTSC or PAL televisions, where the desired format is selected via the OSD:
NTSC (National Television Standards Committee (USA) or National Television Systems
Committee). A television standard with 60 fields per second, 30 frames per second, and 525 lines
per frame. Variations of the standard include NTSC-M. A size used to digitize NTSC is 640x480
pixels. This standard is used in America and parts of Japan.
PAL (Phase Alternation Line). A television standard with 50 fields per second, 25 frames per
second, and 625 lines per frame. Variations of the standard include PAL-B/G. A size used to digi-
tize PAL is 768x576 pixels. This standard is used in parts of Africa, Australia, parts of Europe, and
in the U.K.
The video interface drives several kinds of video digital to analog converters to generate the
analog video monitor drive signals. U1 generates a standard ITU R.BT656 digital video data
stream with embedded synchronization. This standard uses an 8 bit bus, with interleaved Y, Cr, Cb
data. Synchronization information is embedded in the data stream, and exclusively uses values of
00 and FF (hex). Y values are from 1 to 254, with 1 being black. C values are from 1 to 254, with
128 being no chroma. The standard document should be consulted for further details on this bus.
The video encoder (essentially a video digital to analog converter), U601 on sheet 6 of the sche-
matic, is a 44 pin quad flat pack, containing extensive video processing circuitry. The data sheet
for this part (number CS4955) shows the block diagram and signal processing circuitry inside the
chip. The chip has many programmable registers inside, to set different operation modes, etc.
These registers are set by the main processor over a serial I
The CS4955 receives the ITU R.BT656 data bus, decodes the synchronization and separates the
Y, Cr, and Cb values into separate data streams. The three channels of video data are processed
appropriately, and sent to the digital to analog converters. Composite video is generated at pin 44,
S-video Y and C are generated at pins 48 and 47, and RGB or YCrCb are generated at pins 39,40,
and 43. The Composite video and S video are paralleled on the circuit board with the RGB (or
YCrCb) signals. The appropriate DACs are enabled by internal control circuitry, commanded by the
main processor, depending on the mode selected by the user. This allows either Composite and S-
video, or Component video, to be placed on the output jacks of the AV28 console.
Theory of Operation
CS4988
Analog
Video
Encoder
U601
External
Video
Video Block Diagram
U603, U604
NJM2284
Video
Switch
U602
NJM2267
2 C bus (pins 32 and 33).
20
Amp
Video
Output