Sony ST-S5 Service Manual page 24

ST-S5
Pin No. Pin Name
VSS
48
49 WMD0
PAGE2
50
VSS
51
PAGE1, PAGE0
52, 53
54 BOOT
BTACT
55
BST
56
MOD1
57
58 MOD0
EXLOCK
59
VDDI
60
VSS
61
62, 63 A17, A16
A15 to A13
64 to 66
67 GP10
DECODE
68
AUDIO
69
70 VDDI
VSS
71
D15 to D12
72 to 75
VDDE
76
77 to 80 D11 to D8
VSS
81
A9, A12 to A10
82 to 85
TDO
86
TMS
87
XTRST
88
TCK
89
TDI
90
VSS
91
A8 to A3
92 to 97
D7, D6
98, 99
VDDI
100
VSS
101
102 to 105 D5 to D2
VDDE
106
107, 108 D1, D0
A2, A1
109, 110
VSS
111
A0
112
113 PM
SDI3, SDI4
114, 115
SYNC
116
117 to 119 VSS
VDDI
120
24
I/O
—
Ground terminal
I S-RAM wait mode setting terminal Fixed at "L" in this set
O
Page selection signal output terminal Not used (open)
—
Ground terminal
O
Page selection signal output terminal Not used (open)
I Boot mode control signal output terminal Not used (fixed at "L")
I
Boot mode state display signal output terminal Not used (open)
I
Boot trap signal input from the M61512FP (IC607)
I
PLL input frequency select terminal
I Mode setting terminal
I
PLL lock error and data error flag input from the digital audio interface receiver (IC604)
—
Power supply terminal (+2.6V)
—
Ground terminal
O Address signal output terminal Not used (open)
O
Address signal output to the S-RAM (IC602)
L/R sampling clock signal (44.1 kHz) output to the D/A, A/D converter (IC605) and digital filter
O
(IC606)
O
Decode signal output to the system controller (IC501)
I
Bit 1 input terminal of channel status from the digital audio interface receiver (IC604)
— Power supply terminal (+2.6V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+3.3V)
I/O Two-way data bus with the S-RAM (IC602)
—
Ground terminal
O
Address signal output to the S-RAM (IC602)
O
Simple emulation data output terminal Not used (open)
I
Simple emulation data input start/end detection signal input terminal Not used (open)
I
Simple emulation asychronous break input terminal Not used (open)
I
Simple emulation clock signal input terminal Not used (open)
I
Simple emulation data input terminal Not used (open)
—
Ground terminal
O
Address signal output to the S-RAM (IC602)
I/O
Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+2.6V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM (IC602)
—
Power supply terminal (+3.3V)
I/O Two-way data bus with the S-RAM (IC602)
O
Address signal output to the S-RAM (IC602)
—
Ground terminal
O
Address signal output to the S-RAM (IC602)
I PLL reset signal input from the M61512FP (IC607) "L": reset
I
Audio serial data input terminal Not used (fixed at "L")
Synchronous/asychronous selection signal input terminal
I
"L": Synchronous, "H": asynchronous (fixed at "H" in this set)
—
Ground terminal
—
Power supply terminal (+2.6V)
Description
"L": 384fs, "H": 256fs (fixed at "H" in this set)
"L": single chip mode, "H": use prohibition (fixed at "L" in this set)