Sony ST-S5 Service Manual page 23

• DSP BOARD IC601 CXD9617R (AUDIO DIGITAL SIGNAL PROCESSOR)
Pin No. Pin Name
VSS
1
XRST
2
EXTIN
3
4 FS2
5 VDDI
FS1
6
PLOCK
7
8 VSS
MCLK1
9
VDDI
10
VSS
11
12 MCLK2
MS
13
SCKOUT
14
LRCKI1
15
16 VDDE
BCKI1
17
SDI1
18
LRCKO
19
20 BCKO
VSS
21
KFSIO
22
23 to 25 SDO1 to SDO3
SDO4
26
SPDIF
27
LRCKI2
28
BCKI2
29
SDI2
30
VSS
31
HACN
32
HDIN
33
HCLK
34
HDOUT
35
HCS
36
SDCLK
37
CLKEN
38
RAS
39
VDDI
40
VSS
41
CAS
42
DQM
43
44 CS0
WE0
45
VDDE
46
WMD1
47
I/O
—
Ground terminal
I
Reset signal input from the M61512FP (IC607) "L": reset
I
Master clock signal input terminal Not used (fixed at "L")
I Sampling frequency selection signal input terminal Not used (fixed at "L")
—
Power supply terminal (+2.6V)
I
Sampling frequency selection signal input terminal Not used (fixed at "L")
O
Internal PLL lock signal output terminal Not used (open)
— Ground terminal
I
Oscillation clock signal input from the digital audio interface receiver (IC604)
—
Power supply terminal (+2.6V)
—
Ground terminal
O Oscillation clock signal output terminal Not used (open)
I
Master/slave selection signal input terminal "L": slave, "H": master (fixed at "L" in this set)
O
Internal system clock signal output to the digital filter (IC606)
I
L/R sampling clock signal (44.1 kHz) input terminal Not used (open)
— Power supply terminal (+3.3V)
I
Bit clock signal (2.8224 MHz) input terminal Not used (open)
I
Audio serial data input from the D/A, A/D converter (IC605)
L/R sampling clock signal (44.1 kHz) output to the D/A, A/D converter (IC605) and digital filter
O
(IC606)
O Bit clock signal (2.8224 MHz) output to the D/A, A/D converter (IC605) and digital filter (IC606)
—
Ground terminal
I
Audio clock signal input from the digital audio interface receiver (IC604)
O
Audio serial data output to the A/D, D/A converter (IC604)
O
Audio serial data output to the digital filter (IC606)
O
S/PIDF signal output terminal Not used (open)
I
L/R sampling clock signal (44.1 kHz) input from the digital audio interface receiver (IC604)
I
Bit clock signal (2.8224 MHz) input from the digital audio interface receiver (IC604)
I
Audio serial data input from the digital audio interface receiver (IC604)
—
Ground terminal
O
Acknowledge signal output to the system controller (IC501)
I
Write data input from the system controller (IC501)
I
Clock signal input from the system controller (IC501)
O
Read data output to the system controller (IC501)
I
Chip select signal input from the system controller (IC501)
O
Clock signal output terminal Not used (open)
O
Clock enable signal output terminal Not used (open)
O
Row address strobe signal input terminal Not used (open)
—
Power supply terminal (+2.6V)
—
Ground terminal
O
Column address strobe signal output terminal Not used (open)
O
Output terminal of data input/output mask Not used (open)
O
Chip select signal output to the S-RAM (IC602)
O
Write enable signal output to the S-RAM (IC602)
—
Power supply terminal (+3.3V)
I
S-RAM wait mode setting terminal Fixed at "H" in this set
Description
ST-S5
23